DLA SMD-5962-86846 REV D-2009 MICROCIRCUIT DIGITAL CMOS 64 X 5 PARALLEL FIFO MONOLITHIC SILICON.pdf

上传人:proposalcash356 文档编号:698910 上传时间:2019-01-01 格式:PDF 页数:16 大小:105.05KB
下载 相关 举报
DLA SMD-5962-86846 REV D-2009 MICROCIRCUIT DIGITAL CMOS 64 X 5 PARALLEL FIFO MONOLITHIC SILICON.pdf_第1页
第1页 / 共16页
DLA SMD-5962-86846 REV D-2009 MICROCIRCUIT DIGITAL CMOS 64 X 5 PARALLEL FIFO MONOLITHIC SILICON.pdf_第2页
第2页 / 共16页
DLA SMD-5962-86846 REV D-2009 MICROCIRCUIT DIGITAL CMOS 64 X 5 PARALLEL FIFO MONOLITHIC SILICON.pdf_第3页
第3页 / 共16页
DLA SMD-5962-86846 REV D-2009 MICROCIRCUIT DIGITAL CMOS 64 X 5 PARALLEL FIFO MONOLITHIC SILICON.pdf_第4页
第4页 / 共16页
DLA SMD-5962-86846 REV D-2009 MICROCIRCUIT DIGITAL CMOS 64 X 5 PARALLEL FIFO MONOLITHIC SILICON.pdf_第5页
第5页 / 共16页
点击查看更多>>
资源描述

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add the F-9 and F-10 packages to the drawing, also added vendor CAGE number 65786 to the drawing. Changes to table I, figure 1, and 6.4. Also added paragraph 4.3.3 to drawing. Editorial changes throughout. 89-01-27 D. R. Cool B Changes in accorda

2、nce with NOR 5962-235-94. 94-07-26 Michael A. Frye C Update drawing to current requirements. Editorial changes throughout. gap 01-04-03 Raymond Monnin D Update drawing to current requirements. Editorial changes throughout. tcr 09-06-15 Joseph Rodenbeck THE ORIGINAL FIRST PAGE OF THIS DRAWING HAS BEE

3、N REPLACED. REV SHET REV D SHET 15 REV STATUS REV D D D D D D D D D D D D D D OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY James E. Jamison DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Ray Monnin COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THI

4、S DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY D. R. Cool MICROCIRCUIT, DIGITAL, CMOS 64 X 5 PARALLEL FIFO, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 88-04-15 AMSC N/A REVISION LEVEL D SIZE A CAGE CODE 67268 5962-86846 SHEET 1 OF 15 DSCC FORM 2

5、233 APR 97 5962-E331-09 .Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86846 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This

6、drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-86846 01 V A Drawing number Device type (see 1.2.1) Cas

7、e outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function Shift in/out rate 01 72404L10 64 x 5 CMOS parallel FIFO 10 MHz 02 72404L15 64 x 5 CMOS parallel FIFO 15 MHz 03 72404L25 64 x 5 CMO

8、S parallel FIFO 25 MHz 04 72404L35 64 x 5 CMOS parallel FIFO 35 MHz 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style S GDFP-F20 or CDFP3-F20 20 Flat package V GDIP1-T18 or CDIP2-T18 18 Dual-in-l

9、ine X GDFP2-F18 18 Flat package 2 CQCC1-N20 20 Square leadless chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Terminal voltage with respect to ground . -0.5 V dc to +7.0 V dc DC output current . 50 mA Storage temperature ra

10、nge . -65C to +150C Maximum power dissipation (PD) 1/ 1.0 W Lead temperature (soldering, 10 seconds) . +260C Thermal resistance, junction-to-case (JC): Cases S, V, X, and 2 See MIL-STD-1835 Junction temperature (TJ) . +175C 1.4 Recommended operating conditions. Supply voltage (VCC) . 4.5 V dc to 5.5

11、 V dc Supply voltage (GND) . 0 V dc Input high voltage (VIH) . 2.0 V dc minimum Input low voltage (VIL) . 0.8 V dc maximum 2/ Case operating temperature range (TC) -55C to +125C _ 1/ Must withstand the added PDdue to short circuit test; e.g., IOS. 2/ -1.5 V undershoots are allowed for 10 ns once per

12、 cycle. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86846 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government spe

13、cification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-P

14、RF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircu

15、it Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event

16、of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individua

17、l item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted tr

18、ansitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requir

19、ements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, constru

20、ction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified

21、 on figure 1. 3.2.3 Block diagrams. The block diagrams shall be as specified on figure 2. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature ran

22、ge. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUI

23、T DRAWING SIZE A 5962-86846 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 4 DSCC FORM 2234 APR 97 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers P

24、IN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices bu

25、ilt in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a man

26、ufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and th

27、e requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that

28、 affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for

29、 ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86846 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions

30、-55C TC+125C VCC= 4.5 V to 5.5 V Group A subgroups Device type Limits Unit unless otherwise specified Min Max Input low current IIL0 V VIN 5.5 V, VCC= 5.5 V 1, 2, 3 All -10 A Input high current IIH0 V VIN 5.5 V, VCC= 5.5 V 1, 2, 3 All +10 A Output low voltage VOLVCC= 4.5 V, IOL= 8.0 mA 1, 2, 3 All 0

31、.4 V VIL= 0.8 V, VIH= 2.0 V Output high voltage VOHVCC= 4.5 V, IOH= -4.0 mA 1, 2, 3 All 2.4 V IL= 0.8 V, VIH= 2.0 V Output short-circuit IOSVCC= 5.5 V, VO= 0 V 1, 2, 3 All -20 -110 mA current 1/ Off-state output IHZVCC= 5.5 V, VO= 2.4 V 1, 2, 3 All +50 A high current Off-state output ILZVCC= 5.5 V,

32、VO= 0.4 V 1, 2, 3 All -50 A low current Operating supply current ICCInputs = VIH1, 2, 3 All 90 mA outputs open Input capacitance CINVIN= 0 V, f = 1.0 MHz, 4 All 7.0 pF TA= +25C, see 4.3.1c Output capacitance COUTVOUT= 0 V, f = 1.0 MHz, 4 All 7.0 pF TA= +25C, see 4.3.1c Functional test See 4.3.1d 7,

33、8 All Shift in rate fINSee figures 3 and 4 2/ 9, 10, 11 01 10 MHz 02 15 03 25 04 35 Shift in to input tIRLSee figures 3 and 4 2/ 9, 10, 11 01 40 ns ready low 3/ 02 35 03 22 04 18 Shift in to input tIRHSee figures 3 and 4 2/ 9, 10, 11 01 45 ns ready high 3/ 02 40 03 30 04 20 Shift out rate fOUTSee fi

34、gures 3 and 5 2/ 9, 10, 11 01 10 MHz 02 15 03 25 04 35 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86846 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LE

35、VEL D SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Conditions -55C TC+125C VCC= 4.5 V to 5.5 V Group A subgroups Device type Limits Unit unless otherwise specified Min Max Shift out to output tORLSee figures 3 and 5 2/ 9, 10, 11 01 40 ns ready

36、low 3/ 02 35 03 21 04 18 Shift out to output tORHSee figures 3 and 5 2/ 9, 10, 11 01 55 ns ready high 3/ 02 40 03 37 04 20 Output data hold tODHSee figures 3 and 5 2/ 9, 10, 11 All 5.0 ns (previous word) 4/ Output data shift tODSSee figures 3 and 5 2/, 5/ 9, 10, 11 01, 02 55 ns (next word) 03 37 04

37、25 Data throughput or tPTSee figures 3, 6, and 7 2/ 9, 10, 11 01, 02 65 ns “fall through“ 4/ 03 60 04 28 RESET MASTER to OR low tMRORLSee figures 3 and 8 2/ 9, 10, 11 01 40 ns 02, 03 35 04 28 RESET MASTER to IR high tMRIRHSee figures 3 and 8 2/ 9, 10, 11 01 40 ns 4/ 02, 03 35 04 28 RESET MASTER to d

38、ata tMRQSee figures 3 and 8 2/ 9, 10, 11 01 40 ns output low 02 35 03 25 04 20 Output valid from OE low tOOESee figures 3 and 9 2/ 9, 10, 11 01 35 ns 02 30 03 20 04 15 Output high impedance tHZOE See figures 3 and 9 2/ 9, 10, 11 01 30 ns from OE high 4/ 02 25 03 15 04 12 Input ready pulse high 4/, 5

39、/ tIPHSee figures 3 and 6 2/ 9, 10, 11 01, 02, 03 10 ns 04 5.0 Output ready pulse high 4/, 5/ tOPHSee figures 3 and 7 2/ 9, 10, 11 01, 02, 03 10 ns 04 5.0 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCI

40、RCUIT DRAWING SIZE A 5962-86846 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Conditions -55C TC+125C VCC= 4.5 V to 5.5 V Group A subgroups Device type Limits Unit unless

41、otherwise specified Min Max Shift in high time 3/ tSIHSee figures 3 and 4 2/ 9, 10, 11 01, 02 20 ns 03 11 04 9.0 Shift in low time tSILSee figures 3 and 4 2/ 9, 10, 11 01 30 ns 02 25 03 24 04 17 Input data setup time tIDSSee figures 3 and 4 2/ 9, 10, 11 All 0 ns Input data hold time tIDHSee figures

42、3 and 4 2/ 9, 10, 11 01 40 ns 02 30 03 20 04 15 Shift out high time 3/ tSOHSee figures 3 and 5 2/ 9, 10, 11 01, 02 20 ns 03 11 04 9.0 Shift out low time tSOLSee figures 3 and 5 2/ 9, 10, 11 01 30 ns 02 25 03 24 04 17 RESET MASTER pulse tMRWSee figures 3 and 8 2/ 9, 10, 11 01 30 ns width 02, 03, 04 2

43、5 RESET MASTER pulse to tMRSSee figures 3 and 8 2/ 9, 10, 11 01 35 ns SI 4/ 02 25 03, 04 10 Data setup to IR 4/ tSIRSee figures 3 and 6 2/ 9, 10, 11 01, 02, 03 5.0 ns 04 3.0 Data hold from IR 4/ tHIRSee figures 3 and 6 2/ 9, 10, 11 01, 02 30 ns 03 20 04 15 Data setup to OR high 4/ tSORSee figures 3

44、and 7 2/ 9, 10, 11 All 0 ns 1/ Not more than one output should be shorted at a time. Duration of the short-circuit condition should not exceed one second. May not be tested, but shall be guaranteed to the limits specified in table I. 2/ AC measurements assume signal transition times of 5 ns or less,

45、 timing reference levels of 1.5 V, input pulse levels of 0 V to 3.0 V and output loading of 30 pF load capacitance. Output timing reference is 1.5 V. 3/ Since these devices are very high speed, care must be exercised in the design of the hardware and timing utilized in the design. Device grounding a

46、nd decoupling are crucial to correct operation as the device will respond to very small glitches due to long reflective lines, high capacitances or poor supply decoupling and grounding. A monolithic ceramic capacitor of 0.1 F directly between VCC and GND with very short lead lengths is recommended.

47、4/ May not be tested, but shall be guaranteed to the limits specified in table I. 5/ This parameter applies to devices communicating with each other in a cascaded mode. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZ

48、E A 5962-86846 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 8 DSCC FORM 2234 APR 97 Device types All Case outlines V and X S 2 Terminal number Terminal symbol 1 OE OE OE 2 IR NC IR 3 SI IR NC 4 D0SI SI 5 D1D0D06 D2 1 17 D3D2D28 D4 3 39 GND D4D410 MR GND GND 11 Q4MR MR 12 Q3Q

展开阅读全文
相关资源
猜你喜欢
相关搜索

当前位置:首页 > 标准规范 > 国际标准 > 其他

copyright@ 2008-2019 麦多课文库(www.mydoc123.com)网站版权所有
备案/许可证编号:苏ICP备17064731号-1