1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Make changes to table I, table II, 4.3.1, 6.4, and figure 3. Editorial changes throughout. 89-01-27 M. A. Frye B Add device type 02. Add one vendor, CAGE 44270. Make changes to table I, figure 2, and figure 3. Make editorial changes throughout. 9
2、0-03-28 M. A. Frye C Update to current requirements. Editorial changes throughout. - drw 03-09-12 Raymond Monnin REV SHET REV SHET REV STATUS REV C C C C C C C C C C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Rick C. Officer DEFENSE SUPPLY CENTER COLUMBUS STANDARD
3、MICROCIRCUIT DRAWING CHECKED BY Charles E. Besore COLUMBUS, OHIO 43216 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUIT, LINEAR, CMOS ARINC BUS INTERFACE, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL
4、 DATE 88-04-21 AMSC N/A REVISION LEVEL C SIZE A CAGE CODE 67268 5962-86880 SHEET 1 OF 14 DSCC FORM 2233 APR 97 5962-E507-03 DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited.Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,
5、-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86880 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL C SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with
6、MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-86880 01 Q A Drawing number Device type (see 1.2.1) Case outline (see 1.2.2) Lead finish (see 1.2.3) 1.2.1 Device types. The device types identify the circuit function as foll
7、ows: Device type Generic number Circuit function 01 HS3282 CMOS ARINC bus interface circuit 1/ 02 HI8282 CMOS ARINC bus interface circuit 1/ 1.2.2 Case outlines. The case outlines are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style Q CDIP2-
8、T40 or GDIP1-T40 40 dual-in-line X CQCC1-N44 44 square leadless chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. 2/ Supply voltage (VCC) . 7.0 V dc Voltage at any pin (except 2, 3, 4, and 5). GND 0.3 V dc to VCC+ 0.3 V dc Vol
9、tage at pins 2, 3, 4, and 5 -29 V dc to +29 V dc Storage temperature range (Tstg) -65C to +150C Power dissipation (PD): Case Q 1.875 W at +25C 3/ Case X. 1.25 W at +25C 3/ Maximum junction temperature (TJ) . +175C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 1.4 Recommended operating
10、 conditions. Supply voltage (VCC) . 5.0 V dc Ambient operating temperature range (TA) -55C to +125C ARINC inputs: Logic “1” input voltage (VIH). 6.7 V dc minimum to 13 V dc maximum Logic “0” input voltage (VIL). -6.7 V dc minimum to -13 V dc maximum Null input voltage (VIN). -2.5 V dc minimum to +2.
11、5 V dc maximum Common mode voltage (VCH) . -5 V dc minimum to +5 V dc maximum 1/ This circuit was designed to be compatible with the Aeronautical Radio, Incorporated (ARINC), specification 429 serial communications protocol. The applicable specifications are designed in this drawing. 2/ All voltages
12、 are referenced to VSS. 3/ Derate above +25C, 12.5 mW/C for case Q and 8.3 mW/C for case X. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86880 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVIS
13、ION LEVEL C SHEET 3 DSCC FORM 2234 APR 97 1.4 Recommended operating conditions - continued. Bi-directional inputs: Logic “1” input voltage (VIH). 2.1 V dc minimum Logic “0” input voltage (VIL). 0.7 V dc maximum All other inputs: Logic “1” input voltage (VIH). 3.5 V dc minimum Logic “0” input voltage
14、 (VIL). 0.7 V dc maximum 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those listed in the
15、 issue of the Department of Defense Index of Specifications and Standards (DoDISS) and supplement thereto, cited in the solicitation. SPECIFICATION DEPARTMENT OF DEFENSE MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. STANDARDS DEPARTMENT OF DEFENSE MIL-STD-883 - Test
16、Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. HANDBOOKS DEPARTMENT OF DEFENSE MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Unless otherwise indicated, copies of the specification, standar
17、ds, and handbooks are available from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence
18、. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86880 DEFENSE SUPPLY CENTER COLUM
19、BUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL C SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is
20、produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in ac
21、cordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“
22、certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The c
23、ase outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Block diagram. The block diagram shall be as specified on figure 2. 3.2.4 Switching waveforms. The switching waveforms shall be as specified on figure
24、3. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the ambient operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgr
25、oups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked as listed in MIL-
26、HDBK-103 (see 6.6 herein). For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN device
27、s built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a
28、 manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A an
29、d the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required in accordance w
30、ith MIL-PRF-38535, appendix A. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IH
31、SNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86880 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL C SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Con
32、ditions -55C TA +125C unless otherwise specified Group A subgroups Device type Limits Unit Min MaxLogic “1” output VOHIOH= -1.5 mA, VCC= 5.0 V 1, 2, 3 All 2.7 V Logic “0” output VOLIOH= 1.8 mA, VCC= 5.0 V 1, 2, 3 All 0.4 V Output capacitance COTA= +25C 1/ 4 All 15 pF Supply current (standby) ICC1VCC
33、= 5.25 V, VIN= 0 V 1, 2, 3 All 20 mA Supply current (operation) ICC2VCC= 5.25 V 2/ 1, 2, 3 All 20 mA Input leakage 3/ IILVIN= 0 V 1, 2, 3 01 -75 A VIN= 0 V, maximum pull-up current 02 -20 IIHVIN= VCC1, 2, 3 All 10 A Input leakage (bi-directional input) II0 V VIN VCC1, 2, 3 All -1.5 1.5 A Input leaka
34、ge (ARINC input) IILVIN= 0 V 1, 2, 3 All -450 A IIHVIN= VIH1, 2, 3 01 200 A VCC= 5.25 V, VIN= VCC02 200 Input impedance to VCC(ARINC input) RH4, 5, 6 All 12 k Input capacitance to VCC(ARINC input) CHTA= +25C 1/ 4 All 20 pF Input capacitance to GND (ARINC input) CGTA= +25C 1/ 4 All 20 pF Differential
35、 input impedance (ARINC input) RI4, 5, 6 All 12 k Input capacitance (all other inputs) CITA= +25C 1/ 4 All 25 pF Input impedance to GND (ARINC input) RG4, 5, 6 All 12 k Differential input capacitance (ARINC input) CITA= +25C 1/ 4 All 20 pF Clock frequency FCVCC= 4.75 V and 5.25 V, 50% duty cycle 5/
36、7, 8 All 1 MHz Data rate FDVCC= 4.75 V and 5.25 V 7, 8 All 100 kHz See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86880 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000
37、 REVISION LEVEL C SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - continued. Test Symbol Conditions 4/ -55C TA +125C unless otherwise specified Group A subgroups Device type Limits Unit Min MaxData select to data enable time tSELENSee figure 3 9, 10, 11 All 20 ns Outp
38、ut data disable time tDATAENSee figure 3 1/ 9, 10, 11 01 80 ns 02 150 Control word register strobe pulse width tCWSTRSee figure 3 9, 10, 11 All 130 ns Transmitter ready delay time tTX/RSee figure 3 9, 10, 11 All 840 ns Data word setup time tDWSETSee figure 3 9, 10, 11 All 110 ns Data word hold time
39、tDWHLDSee figure 3 9, 10, 11 01 0 ns 02 20 Enable transmit to output data valid time tENDATSee figure 3 FD = 12.5 kbps 9, 10, 11 All 200 s FD = 100 kbps 25 Output data bit time tBITSee figure 3 FD = 12.5 kbps 9, 10, 11 All 39.6 40.4 s FD = 100 kbps 4.95 5.05 Output data null time tNULSee figure 3 FD
40、 = 12.5 kbps 9, 10, 11 All 39.6 40.4 s FD = 100 kbps 4.95 5.05 Data transmission word to tX/Rset time tDTX/RSee figure 3 9, 10, 11 01 400 ns See figure 3 FD = 12.5 kbps 02 38.5 s FD = 100 kbps 3.5 Enable transmit turnoff time tENTXRSee figure 3 9, 10, 11 All 0 ns Data word gap time tGAPSee figure 3
41、FD = 12.5 kbps 9, 10, 11 All 316.8 323.2 s FD = 100 kbps 39.6 40.4 Data enable to parallel load delay time tENPLSee figure 3 9, 10, 11 All 0 ns Data enable hold for parallel hold time tPLENSee figure 3 9, 10, 11 All 0 ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or
42、networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86880 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL C SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - continued. Test Symbol Conditions 4/ -55C TA +12
43、5C unless otherwise specified Group A subgroups Device type Limits Unit Min MaxEnable transmit delay time tTX/RENSee figure 3 9, 10, 11 All 0 ns Control word setup time tCWSETSee figure 3 9, 10, 11 01 130 ns 02 140 Control word hold time tCWHLDSee figure 3 9, 10, 11 01 0 ns 02 40 Parallel load pulse
44、 width tPLSee figure 3 9, 10, 11 All 200 ns Parallel load 1 to parallel 2 delay tPL12See figure 3 9, 10, 11 All 0 ns Clock rise time tLHCSee figure 3 1/ 9, 10, 11 01 10 ns Master reset pulse width tMRSee figure 3 9, 10, 11 01 200 ns 02 400 Receiver device ready time from 32NDdata bit tD/R2See figure
45、 3 FD = 12.5 kbps 9, 10, 11 All 128 s 6/ FD = 100 kbps 16 Device ready to enable time tD/RENSee figure 3 9, 10, 11 All 0 ns Data enable pulse width tENSee figure 3 9, 10, 11 01 200 ns 02 240 Data enable to data enable time tENENSee figure 3 9, 10, 11 All 50 ns Data enable to device ready time tEN/RS
46、ee figure 3 9, 10, 11 All 200 ns Output data valid to enable time tENDATASee figure 3 9, 10, 11 All 200 ns Data enable to data select time tENSELSee figure 3 9, 10, 11 01 20 ns 02 50 1/ Guaranteed but only tested initially and after design changes. 2/ VIN= Logic “1” for all inputs except pins 8 and
47、33 which are logic “0”. 3/ For case Q: Pins 8, 9, 10, 28, 29, 33, 34, 37, and 39. For case X: Pins 10, 11, 12, 31, 32, 36, 37, 41, and 43. 4/ AC test conditions: VCC= 5.0 V. 5/ 60 to 40 percent duty cycle is acceptable. 6/ Same delay for 25-bit word format. Device 01 only. Provided by IHSNot for Res
48、aleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86880 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL C SHEET 8 DSCC FORM 2234 APR 97 Device types 01 and 02 Device types 01 and 02 Case outlines Q X Case outlines Q X Terminal number Terminal symbol Terminal number Terminal symbol 1 VCCVCC23 BD04 BD06 2 429D11(A) 429D11(A) 24 BD03 GND 3 429D11(B) 429D11(B) 25 BD02 BD05 4 429D12(A) 429D12(A) 26 BD01 BD04 5 429D12(B) 429D12(B) 27 BD00 BD03 6 D/R1 N/C 28 PL1 BD02 7 D/R2 N/C 29 PL2 BD01 8 S
