1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R192-92. 92-04-24 Monica L. Poelking B Update to reflect latest changes in format and requirements. Editorial changes throughout. - les 01-10-29 Raymond Monnin C Update drawing to current requirements. Editoria
2、l changes throughout. - gap 09-01-23 Robert M. Heber CURRENT CAGE CODE IS 67268. The original first sheet of this drawing has been replaced. REV SHET REV SHET REV STATUS REV C C C C C C C C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY Monica Grosel DEFENSE SUPPLY CENTER CO
3、LUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY D. A. DiCenzo COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY N. A. Hauck MICROCIRCUIT, DIGITAL, ADVANCED LOW POWER SCHOTTKY TTL, UNIVERSAL AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAW
4、ING APPROVAL DATE 87-02-20 MULTIPLEXER, MONOLITHIC SILICON AMSC N/A REVISION LEVEL C SIZE A CAGE CODE 14933 5962-87533 SHEET 1 OF 12 DSCC FORM 2233 APR 97 5962-E363-08 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE
5、 A 5962-87533 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part o
6、r Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-87533 01 K X Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circ
7、uit function 01 54ALS857 Hex, two-input universal multiplexer with 3-state outputs 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style L GDIP3-T24 or GDIP4-T24 24 Dual-in-line K GDFP2-F24 or GDFP3-
8、F24 24 Flat package 3 CQCC1-N28 28 Square chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage (VCC) -0.5 V dc to +7.0 V dc Input voltage range . -1.5 V dc at -18 mA to +7.0 V dc Storage temperature range . -65C to
9、 +150C Maximum power dissipation (PD) 1/ 198 mW Lead temperature (soldering, 10 seconds) +300C Thermal resistance, junction-to-case (JC) See MIL-STD-1835 Junction temperature (TJ) +175C 1.4 Recommended operating conditions. Supply voltage range (VCC) . +4.5 V dc to 5.5 V dc maximum Minimum high leve
10、l input voltage (VIH) 2.0 V Maximum low level input voltage (VIL) . 0.7 V Normalized fanout (each output) 2/ 10 maximum at low logic level 20 maximum at high logic level Case operating temperature range (TC) -55C to +125C _ 1/ Must withstand the added PDdue to short circuit test (e.g. IO). 2/ Device
11、 will fanout in both high and low levels to the specified number of data inputs on the same device type as that being tested. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87533 DEFENSE SUPPLY CENTER COLUMB
12、US COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, th
13、e issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface S
14、tandard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or from the Standardization Docu
15、ment Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable la
16、ws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by
17、 a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance wi
18、th MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certificati
19、on mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outline
20、s shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.3 Electrical performan
21、ce characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table I
22、I. The electrical tests for each subgroup are described in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87533 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 4 DSCC
23、 FORM 2234 APR 97 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limita
24、tions, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“
25、 certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate
26、of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535,
27、appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the optio
28、n to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4
29、.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C or D. The test circuit
30、 shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in
31、 method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. Provided by IHSNot for ResaleNo reproduction o
32、r networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87533 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC+125C 1/ Group A
33、subgroups Limits Unit unless otherwise specified Min Max High level output voltage VOHVCC= 4.5 V, IOH= -100 A, VIN= 0.7 V or 2.0 V 1, 2, 3 2.4 V Low level output voltage VOLVCC= 4.5 V, IOL= 12 mA, VIN= 0.7 V or 2.0 V 1, 2, 3 0.4 V Input clamp voltage VI CVCC= 4.5 V, IIN= -18 mA, TC= 25C 1, 2, 3 -1.5
34、 V Low level input current IILVCC= 5.5 V, VIN= 0.4 V 1, 2, 3 -200 A High level input current II H1 VCC= 5.5 V, VIN= 2.7 V 1, 2, 3 60 A II H2 VCC= 5.5 V, VIN= 7.0 V 1, 2, 3 300 A Off-state output current, high level voltage applied IOZH VCC= 5.5 V, VO= 2.7 V 1, 2, 3 20 A Off-state output current, low
35、 level voltage applied IOZL VCC= 5.5 V, VO= 0.4 V 1, 2, 3 -20 A Output circuit 1/ IOVCC= 5.5 V, VO= 2.25 V 1, 2, 3 -15 -110 mA Supply current outputs high ICCH VCC= 5.5 V, VIN= 0.0 V or 4.5 V as applicable 1, 2, 3 24 mA Supply current outputs low ICCL VCC= 5.5 V, VIN= 0.0 V or 4.5 V as applicable 1,
36、 2, 3 33 mA Supply current outputs disabled ICCZ VCC= 5.5 V 1, 2, 3 36 mA Functional tests See 4.3.1c 7 tPLH1 9, 10, 11 35 ns Propagation delay time, A to output tPHL1 VCC= 5.0 V, CL= 50 pF 10, RL= R1= 500 9, 10, 11 35 ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or
37、 networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87533 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions -55C TC+125C
38、1/ Group A subgroups Limits Unit unless otherwise specified Min Max tPLH2 VCC= 5.0 V, CL= 50 pF 10%, 9, 10, 11 35 ns Propagation delay time, B to output tPHL2 RL= R1= 500 9, 10, 11 35 ns tPLH3 9, 10, 11 37 ns Propagation delay time, S0 to output tPHL3 9, 10, 11 37 ns tPLH4 9, 10, 11 37 ns Propagatio
39、n delay time, S1 to output tPHL4 9, 10, 11 37 ns tPLH5 9, 10, 11 26 ns Propagation delay time, COMP to output tPHL5 9, 10, 11 26 ns tPLH6 9, 10, 11 45 ns Propagation delay time, from A to OPER = 0 tPHL6 9, 10, 11 45 ns tPLH7 9, 10, 11 45 ns Propagation delay time, from B to OPER = 0 tPHL7 9, 10, 11
40、45 ns tPLH8 9, 10, 11 32 ns Propagation delay time, from S0 to OPER = 0 tPHL8 9, 10, 11 32 ns tPLH9 9, 10, 11 32 ns Propagation delay time, from S1 to OPER = 0 tPHL9 9, 10, 11 32 ns See footnote at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license fro
41、m IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87533 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test SymbolConditions -55C TC+125C 1/ Group A subgroups Limits Unit unless ot
42、herwise specified Min Max tPZH1 VCC= 5.0 V, CL= 50 pF 10%, 9, 10, 11 38 ns Enable time from S0 to output tPZL1 RL= R1= 500 9, 10, 11 38 ns tPZH2 9, 10, 11 38 ns Enable time from S1 to output tPZL2 9, 10, 11 38 ns tPZH3 9, 10, 11 28 ns Enable time from S1 to OPER = 0 tPZL3 9, 10, 11 28 ns Enable time
43、 from COMP to output tPZL4 9, 10, 11 37 ns Enable time from S0 to OPER = 0 tPZL5 9, 10, 11 29 ns Enable time from COMP to OPER = 0 tPZL6 9, 10, 11 43 ns tPHZ1 9, 10, 11 43 ns Disable time from S0 to output tPLZ1 9, 10, 11 43 ns tPHZ2 9, 10, 11 43 ns Disable time from S1 to output tPLZ2 9, 10, 11 43
44、ns tPHZ3 9, 10, 11 37 ns Disable time from S1 to OPER = 0 tPLZ3 9, 10, 11 37 ns Disable time from COMP to output tPLZ4 9, 10, 11 45 ns Disable time from S0 to OPER = 0 tPLZ5 9, 10, 11 42 ns Disable time from COMP to OPER = 0 tPLZ6 9, 10, 11 36 ns 1/ The output conditions have been chosen to produce
45、a current that closely approximates one half of the true short-circuit output current, IO. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87533 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISI
46、ON LEVEL C SHEET 8 DSCC FORM 2234 APR 97 Case outlines K and L 3 Terminal number Terminal symbol Terminal symbol 1 S0 NC 2 1A S0 3 1B 1A 4 1Y 1B 5 2A 1Y 6 2B 2A 7 2Y 2B 8 3A NC 9 3B 2Y10 3Y 3A 11 OPER = 0 3B 12 GND 3Y 13 COMP OPER = 0 14 4Y GND 15 4B NC16 4A COMP 17 5Y 4Y18 5B 4B 19 5A 4A 20 6Y 5Y 2
47、1 6B 5B 22 6A NC 23 S1 5A 24 VCC 6Y 25 6B 26 6A 27 S1 28 VCCFIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87533 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVIS
48、ION LEVEL C SHEET 9 DSCC FORM 2234 APR 97 COMP S1 S0 A B Y OPER = 0L L L L L L H L L L L H L H L L L H L H L L L L H H H L L L H L L L H L L H L H H L L L H H L L H L L H H H H L L H L L L L Z L H L L H L Z L H L H L L Z L H L H H H Z L H H X X L L L H H X X L L L H H X X L L L H H X X L L H L L L L H H H L L L H H H H L L H L L L H L L H H L L H L H L L H H H L H L H L L H L H H L H H H L H H H L L H H L L L H Z H H L L H H Z H H L H L H Z H H L H H L Z H H H X X Z Z H H H X X Z Z H H H X X Z Z H H H X X Z
