DLA SMD-5962-87570 REV E-2007 MICROCIRCUIT DIGITAL PROGRAMMABLE PERIPHERAL INTERFACE MONOLITHIC SILICON《硅单块 可编程序外围接口数字微型电路》.pdf

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DLA SMD-5962-87570 REV E-2007 MICROCIRCUIT DIGITAL PROGRAMMABLE PERIPHERAL INTERFACE MONOLITHIC SILICON《硅单块 可编程序外围接口数字微型电路》.pdf_第1页
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1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Technical changes to table I. Editorial changes throughout. 92-10-27 Monica L. Poelking B Changes in accordance with NOR 5962-R019-99. 99-01-28 Monica L. Poelking C Incorporated revision B and updated boilerplate and editorial changes throughout.

2、 Added Rochester Electronics as source of supply CAGE code 3V146. - LTG 00-10-19 Thomas M. Hess D Update boilerplate to MIL-PRF-38535 requirements. - LTG 01-04-02 Thomas M. Hess E Update boilerplate to current MIL-PRF-38535 requirements. - CFS 07-06-25 Thomas M. Hess REV SHET REV E SHET 15 REV STATU

3、S REV E E E E E E E E E E E E E E OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Ray Monnin DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY D. A. DiCenzo COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMEN

4、TS APPROVED BY N. A. Hauck MICROCIRCUIT, DIGITAL, PROGRAMMABLE AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 87-07-02 PERIPHERAL INTERFACE, MONOLITHIC SILICON AMSC N/A REVISION LEVEL SIZE A CAGE CODE 67268 5962-87570 E SHEET 1 OF 15 DSCC FORM 2233 APR 97 5962-E508-07 Provided by IH

5、SNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87570 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements f

6、or MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-87570 01 Q X Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.

7、2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 8255A Programmable peripheral interface 02 8255A-5 Programmable peripheral interface 1.2.2 Case outlines. The case outlines are as designated in MIL-STD-1835 and as f

8、ollows: Outline letter Descriptive designator Terminals Package style Q GCIP1-T40 or CDIP2-T40 40 Dual-in-line X CQCC1-N44 44 Square leadless chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage range . -0.5 V dc t

9、o +7.0 V dc Input voltage range . -0.5 V dc to +7.0 V dc Storage temperature range . -65C to +150C Maximum power dissipation (PD) . 1.0 W 1/ Thermal resistance, junction-to-case (JC): Case Q . See MIL-STD-1835 Case X . See MIL-STD-1835 Junction temperature (TJ) +126.9C Lead temperature (soldering, 1

10、0 seconds) +300C 1.4 Recommended operating conditions. Supply voltage range (VCC) . +5.0 V dc 10 percent Minimum high level input voltage (VIH) +2.2 V dc Maximum low level input voltage (VIL) . +0.8 V dc Minimum low level input voltage (VIL) -0.5 V dc Maximum high level input voltage (VIH) . +5.5 V

11、dc Case operating temperature range (TC) -55C to +125C _ 1/ Must withstand the added PDdue to short circuit test (e.g., IOS). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87570 DEFENSE SUPPLY CENTER COLUMB

12、US COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, th

13、e issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface S

14、tandard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or

15、from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, howe

16、ver, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to thi

17、s drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activ

18、ity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herei

19、n. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. This drawing has been modified to allow the manufacturer to use the alternate die/fabrication requirements of paragraph A.3.2.2 of MIL-PRF-38535 or other alternative approv

20、ed by the qualifying activity. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connectio

21、ns. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Block diagram. The block diagram shall be as specified on figure 3. 3.2.5 Timing waveforms. The timing waveforms shall be as specified on figure 4. 3.3 Electric

22、al performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specifie

23、d in table II. The electrical tests for each subgroup are described in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87570 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E

24、SHEET 4 DSCC FORM 2234 APR 97 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to

25、space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a

26、“Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. For product built in accordance with A.3.2.2 of MIL-PRF-38535, or as modified in the manufacturers QM plan, the “QD” certification mark shall be used in place of the “Q“ or “QML“ certificat

27、ion mark. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall

28、 affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.

29、8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore do

30、cumentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87570 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET

31、 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC +125C 4.5 V VCC 5.5 V unless otherwise specified Group A subgroups Device type Limits Unit Min Max Low-level input voltage VILVCC= 5.5 V, VCC= 4.5 V All 1, 2, 3 0.8 V High-level input voltage VIH

32、VCC= 5.5 V, VCC= 4.5 V All 1, 2, 3 2.2 V Output low voltage- DATABUS VOLVCC= 5.5 V, IOL= 2.5 mA All 1, 2, 3 0.45 V Output low voltage- PORTS VOLVCC= 5.5 V, IOL= 1.7 mA All 1, 2, 3 0.45 V Output high voltage- DATABUS VOHVCC= 4.5 V, IOH = -400 A All 1, 2, 3 2.4 V Output high voltage- PORTS VOHVCC= 4.5

33、 V, IOH = -200 A All 1, 2, 3 2.4 V Darlington drive current IDARVCC= 5.5 V, VCC= 4.5 V (Ports B and C) All 1, 2, 3 -1.0 -4.0 mA Power supply current ICCVCC= 5.5 V 1/ All 1, 2, 3 120 mA Input load current IILVCC= 5.5 V VIN= 5.5 V to 0.0 V All 1, 2, 3 -10.0 +10.0 A Output float leakage IOFLVCC= 5.5 V

34、VOUT= 5.5 V to 0.45 V All 1, 2, 3 -10.0 +10.0 A Input capacitance CINTC= +25C, FC= 1 MHz See 4.3.1c All 4 25 pF I/O capacitance CI/OTC= +25C, see 4.3.1c Unmeasured pins are returned to ground. VCC= GND = 0.0 V All 4 25 pF Functional tests See 4.3.1d All 7, 8 Address stable before READ tARAll 9, 10,

35、11 0.0 ns Address stable after READ tRAAll 9, 10, 11 0.0 ns READ pulse width tRRAll 9, 10, 11 300.0 ns 01 9, 10, 11 250.0 Data valid from READ tRD02 9, 10, 11 200.0 ns 01 9, 10, 11 10.0 3/ 150.0 Data float after READ tDF2/ VCC= 5.5 V, 4.5V VIH= 2.4 V, VIL= 0.45 V VOH= 2.0 V, VOL= 0.8 V CL= 100 pF Se

36、e figure 4 02 9, 10, 11 10.0 100.0 ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87570 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 6 DSC

37、C FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions -55C TC +125C 4.5 V VCC 5.5 V unless otherwise specified Group A subgroups Device type Limits Unit Min Max Time between READS and/or WRITES tRVAll 9, 10, 11 850.0 3/ ns Address stable before WRITE

38、tAWAll 9, 10, 11 0.0 ns Address stable after WRITE tWAAll 9, 10, 11 20.0 ns 01 9, 10, 11 400.0 Write pulse width tWW02 9, 10, 11 300.0 ns Data valid to WRITE (T. E.) tDWAll 9, 10, 11 100.0 ns Data valid after WRITE tWDAll 9, 10, 11 30.0 ns WRITE = 1 to output tWBAll 9, 10, 11 350.0 ns Peripheral dat

39、a before READ tIRAll 9, 10, 11 0.0 ns Peripheral data after READ tHRAll 9, 10, 11 0.0 ns ACK pulse width tAKAll 9, 10, 11 300.0 ns STB pulse width tSTAll 9, 10, 11 500.0 ns Peripheral data before T. E. of STB tPSAll 9, 10, 11 0.0 ns Peripheral data after T. E. of STB tPHAll 9, 10, 11 180.0 ns ACK =

40、0 to output tADAll 9, 10, 11 300.0 ns ACK = 1 to output float tKD3/ All 9, 10, 11 20.0 3/ 250.0 3/ ns WRITE = 1 to OBF = 0 tWOBAll 9, 10, 11 650.0 ns ACK = 0 to OBF = 1 tAOBAll 9, 10, 11 350.0 ns STB = 0 to IBF = 1 tSIBAll 9, 10, 11 300.0 ns READ = 1 to IBF = 0 tRIBAll 9, 10, 11 300.0 ns READ = 0 to

41、 INTR = 0 tRITAll 9, 10, 11 400.0 ns STB = 1 to INTR = 1 tSITAll 9, 10, 11 300.0 ns ACK = 1 to INTR = 1 tAITAll 9, 10, 11 350.0 ns WRITE = 0 to INTR = 0 4/ tWITVCC= 5.5 V, 4.5V VIH= 2.4 V, VIL= 0.45 V VOH= 2.0 V, VOL= 0.8 V CL= 100 pF See figure 4 All 9, 10, 11 850.0 ns 1/ ICCtest conditions: The su

42、pply current is measured with loaded outputs while running ac patterns. 2/ AC float timing parameters tDFand tKDare tested logic 0 to float only. 3/ Guaranteed if not tested. 4/ When measured from WRITE = 0 to INTR = 0, the limits shall be as follows: For device type 01, maximum limit shall be as sp

43、ecified at 850 ns. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87570 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 7 DSCC FORM 2234 APR 97 Device type All Case outline X

44、Terminal number Terminal symbol Terminal number Terminal symbol 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 PA3PA2PA1PA0RD CS GND NC A1A0PC7PC6PC5PC4PC0PC1PC2PC3PB0PB1PB2PB323 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 PB4PB5PB6PB7VCCNC NC D7D6D5D4D3D2D1D0RESET NC WR

45、 PA7PA6PA5PA4Device type All Case outline Q Terminal number Terminal symbol Terminal number Terminal symbol 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 PA3PA2PA1PA0RD CS GND A1A0PC7PC6PC5PC4PC0PC1PC2PC3PB0PB1PB221 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 PB3PB4PB5PB6PB7VCCD7D6

46、D5D4D3D2D1D0RESET WR PA7PA6PA5PA4FIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87570 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 8 DSCC FO

47、RM 2234 APR 97 A1A0RD WR CS Input operation (read) 0 0 0 1 0 Port A-data bus 0 1 0 1 0 Port B-data bus 1 0 0 1 0 Port C-data bus Output operation (write) 0 0 1 0 0 Data bus-port A 0 1 1 0 0 Data bus-port B 1 0 1 0 0 Data bus-port C 1 1 1 0 0 Data bus-control Disable function X X X X 1 Data bus-three

48、-state 1 1 0 1 0 Illegal condition X X 1 1 0 Data bus three-state FIGURE 2. Truth table. FIGURE 3. Logic diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87570 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 9 DSCC FORM 2234 APR 97 AC testing load circuits NOTE: VEXTis set at various voltages during testing to guarantee the specification. NOTE: This test circuit is the dynamic load. AC testing input and

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