1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Convert to new boilerplate format. Added device types 06, 07, and 08 for vendor CAGE 01295. Added technical changes to sections 1.3 and 1.4. Technical changes to table I. Added device types 06, 07, and 08 to figure 1. Technical change to figure 2
2、 Editorial changes throughout. 90-07-25 W. Heckman B Changes in accordance with NOR 5962-R199-92. 92-05-07 Monica L. Poelking C Changes in accordance with NOR 5962-R281-92. 92-10-05 Monica L. Poelking D Changes in accordance with NOR 5962-R253-94. 94-07-25 Monica L. Poelking E Changes in accordance
3、 with NOR 5962-R021-98. 98-02-10 Charles F. Saffle F Update boilerplate to MIL-PRF-38535 requirements. Correct document title to accurately describe device function. - CFS 03-08-04 Thomas M. Hess G Update boilerplate to MIL-PRF-38535 requirements. - CFS 08-05-05 Thomas M. Hess REV SHET REV G G G G G
4、 G G G SHEET 15 16 17 18 19 20 21 22 REV STATUS REV G G G G G G G G G G G G G G OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Todd D. Creek DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Ray Monnin COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS
5、 DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUIT, DIGITAL, CMOS, DIGITAL AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 88-09-27 SIGNAL PROCESSOR, MONOLITHIC SILICON AMSC N/A REVISION LEVEL G SIZE A CAGE CODE 67268 5962-87633 SHEET 1 OF 22 DS
6、CC FORM 2233 APR 97 5962-E350-08 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87633 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scop
7、e. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-87633 01 Q X Drawing number Device type (see 1.
8、2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function Frequency 01 320C10 Digital signal processor 20 MHz 02 320C10-25 Digital signal processor 25 MHz 03 320CM10 Digital signal
9、 processor with 20 MHz mask programmable ROM 04 320CM10-25 Digital signal processor with 25 MHz mask programmable ROM 05 320CF10-25 Digital signal processor 6.7 25 MHz 06 320E15 Digital signal processor with 20 MHz EPROM 07 320C15 Digital signal processor 6.7 20 MHz 08 320C15-25 Digital Signal proce
10、ssor 6.7 25 MHz 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style Q GDIP1-T40 or CDIP2-T40 40 Dual-in-line X CQCC1-N44 44 Square leadless chip carrier Y CQCC2-J44 44 “J” lead chip carrier 1.2.3 L
11、ead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage range (VCC) -0.3 V dc to +7.0 V dc Input/output voltage range -0.3 V dc to VCC+0.3 V dc Input voltage range for device type 06 . -0.3 V dc to +15.0 V dc Storage temperature range -6
12、5C to +150C Power dissipation for device types 01-05, 07, 08 . 0.4 W Power dissipation for device type 06 0.495 W Lead temperature (soldering, 10 seconds). +300C Maximum junction temperature (TJ) . +150C Thermal resistance, junction-to-case (JC): See MIL-STD-1835 Provided by IHSNot for ResaleNo repr
13、oduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87633 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 3 DSCC FORM 2234 APR 97 1.4 Recommended operating conditions. Supply voltage range (VCC) +4.5 V dc to +5.5 V d
14、c Supply voltage (VSS). 0.0 V dc Minimum high-level input voltage (VIH): All inputs except CLKIN +2.0 V dc CLKIN. +3.0 V dc Maximum low-level input voltage (VIL): Device types 01-08 (all other). +0.8 V dc Device types 01-08 (MC/MP) +0.8 V dc High-level output current (IOH) -300 A Low-level output cu
15、rrent (IOL) . +2.0 mA Master clock cycle time: Device types 01, 03, 06, 07 48.78 ns to 150 ns Device types 02, 04 39.06 ns to 66.67 ns Device types 05, 08 39.06 ns to 150 ns Rise time master clock input 10 ns maximum Fall time master clock input 10 ns maximum Case operating temperature range (TC) .
16、55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitatio
17、n or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFE
18、NSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenu
19、e, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specif
20、ic exemption has been obtained. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87633 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.
21、1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a ma
22、nufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan ma
23、y make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow o
24、ption is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal
25、 connections shall be as specified on figure 1. 3.2.3 Functional block diagram. The functional block diagram shall be as specified on figure 2. 3.2.5 Switching waveforms and test circuits. The switching waveforms and test circuits shall be as specified on figure 3. 3.3 Electrical performance charact
26、eristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The ele
27、ctrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN nu
28、mber is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “
29、C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDB
30、K-103 and QML38535 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A cert
31、ificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DSCC, DSC
32、Cs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 User mask program. For device types 03 and 04, since the ROM is programmed by
33、the manufacturer in a variety of configurations, the contracting activity shall provide an altered item drawing describing the mask program to be used by the manufacturer. This drawing shall consist of the desired mask program supplied on one or more of the following media: Truth table, floppy disk,
34、 or EPROM. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87633 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 5 DSCC FORM 2234 APR 97 3.11 Additional processing for device t
35、ype 06. All testing requirements and quality assurance provisions herein shall be satisfied by the manufacturer prior to delivery. 3.11.1 Erasure of EPROMS for device type 06. When specified, devices shall be erased in accordance with the procedures and characteristics specified in 4.4. 3.11.2 Progr
36、ammability of EPROMS for device type 06. When specified, devices shall be programmed to the specified pattern using the procedures and characteristics specified in 4.5. 3.11.3 Verification of erasure or programmability of EPROMS for device type 06. When specified, devices shall be verified as either
37、 programmed to the specified pattern or erased. As a minimum, verification shall consist of performing a functional test (subgroup) to verify that all bits are in the proper state. Any bit that does not verify to be in the proper state shall constitute a failure, and shall be removed from the lot. P
38、rovided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87633 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Te
39、st Symbol Conditions -55C TC +125C 4.5 V VCC 5.5 V unless otherwise specified Group A subgroupsDevice type Limits Unit Min Max IOH= -300 A 2.4 High level output voltage VOHIOH= -20 A 1/ 2/ 1, 2, 3 All VCC- 0.4 V 01-07 0.5 Low level output voltage VOLIOL= 2.0 mA 1, 2, 3 08 0.6 V VCC= 5.5 V, VO= 2.4 V
40、 20 Off-state output current IOZVCC= 5.5 V, VO= 0.4 V 1, 2, 3 All -20 A Input current IIVI= 0.0 V to VCC1, 2, 3 All 50 A 01, 03 65 f = 20.5 MHz 06, 07 90 Supply current ICCf = 25.6 MHz 1, 2, 3 02, 04, 05, 08 75 mA Input capacitance CIN4 All 25 pF Output capacitance COUT4 All 25 pF Input/output capac
41、itance CI/OSee 4.3.1c 4 All 35 pF Functional tests See 4.3.1d 7, 8 All 01, 03, 06, 07 6.7 20.5 02, 04 15.0 25.6 Crystal frequency fX1/ 9, 10, 11 05, 08 6.7 25.6 MHz 01, 03, 06, 07 48.78 150 02, 04 39.06 66.67 Master clock cycle time tC(MC)9, 10, 11 05, 08 39.06 150 ns Pulse duration master clock tW(
42、MCP)1/ See figure 3. 9, 10, 11 All 0.475 tC(MC)0.525 tC(MC)ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87633 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVI
43、SION LEVEL G SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions -55C TC +125C 4.5 V VCC 5.5 V unless otherwise specified Group A subgroupsDevice type Limits Unit Min Max 01, 03, 06, 07 195.12 600 02, 04 156.25 266.67 CLKOUT cycle time tC
44、C)3/ 9, 10, 11 05, 08 156.25 600 ns Delay time CLKIN to CLKOUT tD(MCC)1/ 9, 10, 11 All 15 60 ns Delay time CLKOUT to address bus valid tD19, 10, 11 All 8 1/ 50 ns Delay time CLKOUT to MEN tD29, 10, 11 All .25tC(C)-5 1/ .25tC(C)+15 ns Delay time CLKOUT to MEN tD39, 10, 11 All -10 1/ 15 ns Delay time
45、 CLKOUT to DEN tD49, 10, 11 All .25tC(C)-5 1/ .25tC(C)+15 ns Delay time CLKOUT to DEN tD59, 10, 11 All -10 1/ 15 ns Delay time CLKOUT to WE tD69, 10, 11 All .5tC(C)-5 1/ .5tC(C)+15 ns Delay time CLKOUT to WE tD79, 10, 11 All -10 1/ 15 ns 01, 02, 03, 04, 05, 07, 08 .25tC(C)+65Delay time CLKOUT to dat
46、a bus OUT valid tD89, 10, 11 06 .25tC(C)+80ns Time after CLKOUT that data bus starts to be driven tD99, 10, 11 All .25tC(C)-10 1/ ns 01, 02, 03, 04, 05, 07, 08 .25tC(C)+40Time after CLKOUT that data bus stops being driven tD10See figure 3. 9, 10, 11 06 .25tC(C)+80ns See footnotes at end of table. Pr
47、ovided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87633 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 8 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Co
48、ntinued. Test Symbol Conditions -55C TC +125C 4.5 V VCC 5.5 V unless otherwise specified Group A subgroupsDevice type Limits Unit Min Max 01, 02, 03, 04, 05, 07, 08 1.5tC(C)+50Delay time DEN, WE, and MEN from RS tD111/ 9, 10, 11 06 .5tC(C)+50ns 01, 02, 03, 04, 05, 07, 08 1.25tC(C)+50 Data bus disable time after RS tDIS(R)1/ 9, 10, 11 06 .25tC(C)+50ns Data bus OUT valid after CLKOUT tV9, 10, 11 All .25tC(C)-10 ns Address bus setup time prior to MEN or DEN tSU(A-MD)9, 10, 11 All .25tC(C)-45 ns Setup time data bus valid prior to CLKOUT tSU(D)9, 10, 11
