DLA SMD-5962-87691 REV B-2011 MICROCIRCUIT DIGITAL ADVANCED CMOS 8-INPUT MULTIPLEXER MONOLITHIC SILICON.pdf

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1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add device type 02. Add vendor CAGE F8859. Add section 1.5, radiation features. Add case outline X. Add table III, delta limits. Add device class V criteria. Update boilerplate to MIL-PRF-38535 requirements and to include radiation assured requir

2、ements. Editorial changes throughout. - LTG 05-03-17 Thomas M. Hess B Update radiation features in 1.5 and add SEP table IB. Update boilerplate to current MIL-PRF-38535 requirements. Editorial changes throughout. jak 11-11-18 Thomas M. Hess REV SHEET REV B B B SHEET 15 16 17 REV STATUS REV B B B B B

3、 B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Greg A. Pitz DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 https:/www.landandmaritime.dla.mil/ STANDARD MICROCIRCUIT DRAWING CHECKED BY D. A. DiCenzo THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROV

4、ED BY N. A. Hauck MICROCIRCUIT, DIGITAL, ADVANCED CMOS, 8-INPUT MULTIPLEXER, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 87-08-28 AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-87691 SHEET 1 OF 17 DSCC FORM 2233 APR 97 5962-E031-12 Provided by IHSNot for

5、 ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87691 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels con

6、sisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the

7、PIN. 1.2 PIN. The PIN is as shown in the following examples. For device classes M and Q: 5962 - 87691 01 E A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2) Case outline (see 1.2.4) Lead finish (see 1.2.5) / / Drawing number For device class V: 5962 F 87691 01 V X A

8、 Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2) Device class designator Case outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and a

9、re marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function a

10、s follows: Device type Generic number Circuit function 01 54AC151 8-input multiplexer 02 54AC151 8-input multiplexer 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as listed below. Since the device class designator has been added

11、 after the original issuance of this drawing, device classes M and Q designators will not be included in the PIN and will not be marked on the device. Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B micro

12、circuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87691 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3

13、990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 Dual-in-line F GDFP2-F16 or CDFP3-F16 16 Flat pack X CDFP4-F16 16

14、Flat pack 2 CQCC1-N20 20 Square leadless chip carrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range (VCC) . -0.5 V dc to +7.0 V dc DC input vo

15、ltage range (VIN) . -0.5 V dc to VCC+ 0.5 V dc DC output voltage range (VOUT) -0.5 V dc to VCC+ 0.5 V dc Clamp diode current (IIK, IOK) . 20 mA DC output current (per pin) . 50 mA DC VCCor GND current (per pin) 100 mA Storage temperature range (TSTG) . -65C to +150C Maximum power dissipation (PD) 50

16、0 mW Lead temperature (soldering, 10 seconds): Case outline X . 260C All other case outlines, except case X . 245C Thermal resistance, junction-to-case (JC) See MIL-STD-1835 Junction temperature (TJ) 175C 4/ 1.4 Recommended operating conditions. 2/ 3/ 5/ Supply voltage range (VCC) . +3.0 V dc to +5.

17、5 V dc Input voltage range (VIN) . 0.0 V dc to VCCOutput voltage range (VOUT) 0.0 V dc to VCCCase operating temperature range (TC) -55C to +125C Input rise or fall times (tr, tf): VCC= 3.6 V and 5.5 V 0 to 8 ns/V 1.5 Radiation features. Device type 02: Maximum total dose available (dose rate = 50 30

18、0 rads (Si)/s) . 300 krads (Si) Single event phenomenon (SEP): effective LET, no SEL (see 4.4.4.2) 93 MeV-cm2/mg 6/ effective LET, no SEU (see 4.4.4.2) . 93 MeV-cm2/mg 6/ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels

19、may degrade performance and affect reliability. 2/ Unless otherwise specified, all voltages are referenced to GND. 3/ The limits for the parameters specified herein shall apply over the full specified VCCrange and case temperature range of -55C to +125C. 4/ Maximum junction temperature shall not be

20、exceeded except for allowable short duration burn-in screening conditions in accordance with method 5004 of MIL-STD-883. 5/ Operation from 2.0 V dc to 3.0 V dc is provided for compatibility with data retention and battery back-up systems. Data retention implies no input transition and no stored data

21、 loss with the following conditions: VIH 70% VCC, VIL 30% VCC, VOH 70% VCC -20 A, VOL 30% VCC 20 A. 6/ These limits were obtained during technology characterization and qualification, and are guaranteed by design or process, but not production tested unless specified in the customer through the purc

22、hase order or contract. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87691 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Governm

23、ent specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATIO

24、N MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Mic

25、rocircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publication

26、s. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. JEDEC SOLID STATE TECHNOLOGY ASSOCIATION (JEDEC) JESD-20 - Standard for Description of 54/74ACXXXX and

27、54/74ACTXXXX Advanced High-Speed CMOS Devices. (Copies of these documents are available online at http:/www.jedec.org or from JEDEC Solid State Technology Association, 3103 North 10th Street, Suite 240S, Arlington, VA 22201.) ASTM INTERNATIONAL (ASTM) ASTM F1192- Standard Guide for the Measurement o

28、f Single Event Phenomena (SEP) Induced by Heavy Ion Irradiation of Semiconductor Devices. (Copies of this document is available online at http:/www.astm.org/ or from ASTM International, P. O. Box C700, 100 Barr Harbor Drive, West Conshohocken, PA 19428-2959). (Non-Government standards and other publ

29、ications are normally available from the organizations that prepare or distribute the documents. These documents may also be available in or through libraries or other informational services.) 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cit

30、ed herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance

31、 with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PR

32、F-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for

33、 device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87691 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 3.2.1 Case outline(s). The case outline(s)

34、 shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms

35、 and test circuit. The switching waveforms and test circuit shall be as specified on figure 4. 3.2.6 Radiation exposure circuit. The radiation exposure circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring acti

36、vity upon request. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table IA and shall apply over the full case operating temperature

37、 range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical tests for each subgroup are defined in table IA. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may al

38、so be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V sh

39、all be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class

40、 M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a c

41、ertificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply for this drawing shall affirm

42、that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-P

43、RF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DLA Land and Maritime -VA of change of product (see 6.2 herein) involving devices

44、 acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DLA Land and Maritime, DLA Land and Maritime s agent, and the acquiring activity retain the option to review the manufacturers facility and applicable r

45、equired documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 39 (see MIL-PRF-38535, appendix A). Provided by IHS

46、Not for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87691 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 TABLE IA. Electrical performance characteristics. Test and MIL-STD-883 tes

47、t method 1/ Symbol Test conditions 2/ 3/ -55C TC +125C +3.0 V VCC +5.5 V unless otherwise specified Device type and device class VCCGroup A subgroups Limits 4/ Unit Min Max Positive input clamp voltage 3022 VIC+For input under test, IIN= 1.0 mA All V 0.0 V 1 0.4 1.5 V Negative input clamp voltage 30

48、22 VIC-For input under test, IIN= -1.0 mA All V Open 1 -0.4 -1.5 V High level output voltage 3006 VOH5/ VIN= VIHmin. or VILmax. IOH= -50 A All All 3.0 V 1, 2, 3 2.9 V 4.5 V 1, 2, 3 4.4 5.5 V 1, 2, 3 5.4 VIN= VIHmin. or VILmax. IOH= -4 mA 3.0 V 1, 2, 3 2.4 VIN= VIHmin. or VILmax. IOH= -24 mA 4.5 V 1, 2, 3 3.7 5.5 V 1, 2, 3 4.7 VIN= VIHmin. or VILmax. IOH= -50 mA 5.5 V 1, 2, 3 3.85 Low level output voltage 3007 VOL5/ VIN= VIHmin. or VILmax. IOL= +50 A All All 3.0 V 1, 2, 3 0.1 V 4.5 V 1, 2, 3 0.1 5.5 V 1, 2, 3 0.1 V

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