1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Update boilerplate to MIL-PRF-38535 requirements. Editorial changes throughout. - LTG 05-02-07 Thomas M. Hess B Update boilerplate to MIL-PRF-38535 requirements jak. 11-12-05 Thomas M. Hess REV SHEET REV SHEET REV STATUS REV B B B B B B B B B B B
2、 B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 PMIC N/A PREPARED BY Greg A. Pitz DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil/ STANDARD MICROCIRCUIT DRAWING CHECKED BY D. A. DiCenzo THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY N. A. Hauck
3、MICROCIRCUIT, DIGITAL, ADVANCED CMOS, DUAL 4-INPUT MULTIPLEXER WITH THREE-STATE OUTPUTS, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 87-08-10 AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-87693 SHEET 1 OF 13 DSCC FORM 2233 APR 97 5962-E029-12 Provided b
4、y IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87693 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MI
5、L-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-87693 01 E A Drawing number Device type (see 1.2.1) Case outline (see 1.2.2) Lead finish (see 1.2.3
6、) 1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54AC253 Dual 4-input multiplexer with three-state outputs 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter De
7、scriptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 Dual-in-line package F GDFP2-F16 or CDFP3-F16 16 Flat pack 2 CQCC1-N20 20 Square leadless chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supp
8、ly voltage range (VCC) -0.5 V dc to +6.0 V dc DC input voltage (VIN) -0.5 V dc to VCC+ 0.5 V dc DC output voltage range (VOUT) . -0.5 V dc to VCC+ 0.5 V dc Clamp diode current (IIK, IOK) 20 mA DC output current (IOUT) . 50 mA DC VCCor GND current (ICC, IGND) 100 mA Storage temperature range (TSTG) .
9、 -65C to +150C Maximum power dissipation (PD) . 500 mW Lead temperature (soldering 10 seconds) . +245C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ). +175C 4/ See footnotes on next page. Provided by IHSNot for ResaleNo reproduction or networking permitted wit
10、hout license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87693 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 1.4 Recommended operating conditions. 2/ 3/ 5/ Supply voltage range (VCC) +3.0 V dc to +5.5 V dc Input voltage range (VIN) +0.0 V d
11、c to VCCOutput voltage range (VOUT) . +0.0 V dc to VCCCase operating temperature range (TC) . -55C to +125C Input rise or fall times ( tr- tf): VCC= 3.6 V . 0 to 116 ns (10% to 90%, 40 ns/V) VCC= 5.5 V . 0 to 88 ns (10% to 90%, 20 ns/V) 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards
12、, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated
13、 Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK
14、-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict betwee
15、n the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 1/ Stresses above the absolute maximum rating may cause permanent damage
16、 to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Unless otherwise specified, all voltages are referenced to GND. 3/ The limits for the parameters specified herein shall apply over the full specified VCCrange and case temperature range of -55
17、C to +125C. 4/ Maximum junction temperature shall not be exceeded except for allowable short duration burn-in screening conditions per method 5004 of MIL-STD-883. 5/ Operation from 2.0 V dc to 3.0 V dc is provided for compatibility with data retention and battery back-up systems. Data retention impl
18、ies no input transition and no stored data loss with the following conditions: VIH 70% VCC, VIL 30% VCC, VOH 70% VCC -20 A, VOL 30% VCC 20 A. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87693 DLA LAND AND
19、 MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing th
20、at is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval
21、 in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or
22、“QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outline(s
23、). The case outline(s) shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2
24、.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 4. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full cas
25、e operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall
26、be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/complian
27、ce mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certif
28、icate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply shall af
29、firm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 N
30、otification of change. Notification of change to DLA Land and Maritime -VA shall be required for any change that affects this drawing. 3.9 Verification and review. DLA Land and Maritime, DLA Land and Maritime s agent, and the acquiring activity retain the option to review the manufacturers facility
31、and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87693 DLA LAND AND MARITIME COLUMBU
32、S, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC +125C +3.0 V VCC +5.5 V unless otherwise specified Group A subgroups Device type Limits Unit Min Max High level output voltage VOH1/ VIN= VIHor VILIOH= -5
33、0 A VCC= 3.0 V 1, 2, 3 All 2.9 V VCC= 4.5 V 4.4 VCC= 5.5 V 5.4 VIN= VIHor VILIOH= -4 mA VCC= 3.0 V 2.4 VIN= VIHor VILIOH= -24 mA VCC= 4.5 V 3.7 VCC= 5.5 V 4.7 VIN= VIHor VILIOH= -50 mA VCC= 5.5 V 3.85 Low level output voltage VOL1/ VIN= VIHor VILIOL= +50 A VCC= 3.0 V 1, 2, 3 All 0.1 V VCC= 4.5 V 0.1
34、 VCC= 5.5 V 0.1 VIN= VIHor VILIOL= +12 mA VCC= 3.0 V 0.5 VIN= VIHor VILIOL= +24 mA VCC= 4.5 V 0.5 VCC= 5.5 V 0.5 VIN= VIHor VILIOL= +50 mA VCC= 5.5 V 1.65 High level input voltage VIH2/ VCC= 3.0 V 1, 2, 3 All 2.1 V VCC= 4.5 V 3.15 VCC= 5.5 V 3.85 Low level input voltage VIL2/ VCC= 3.0 V 1, 2, 3 All
35、0.9 V VCC= 4.5 V 1.35 VCC= 5.5 V 1.65 Input leakage current low IILVIN= 0.0 V VCC= 5.5 V 1, 2, 3 All -1.0 A Input leakage current high IIHVIN= 5.5 V 1.0 Quiescent supply current, output high ICCH VIN= VCCor GND VCC= 5.5 V 1, 2, 3 All 160 A Quiescent supply current, output low ICCL 160 Quiescent supp
36、ly current, output three-state ICCZ160 Off-state output leakage current high IOZH VCC= 5.5 V VIN= VCCor GND VOUT= 5.5 V or 0.0 V 1, 2, 3 All 10.0 A Off-state output leakage current low IOZL-10.0 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted witho
37、ut license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87693 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Conditions -55C TC +125C +3.0 V VCC +5.5 V unless otherwise sp
38、ecified Group A subgroups Device type Limits Unit Min Max Input capacitance CINSee 4.3.1c 4 All 8.0 pF Power dissipation capacitance CPD3/ See 4.3.1c 4 All 85.0 pF Functional tests Tested at VCC= 3.0 V and repeated at VCC= 5.5 V See 4.3.1d 7, 8 All L H Propagation delay time, In to Z tPHL14/ CL= 50
39、pF RL= 500 See figure 4 VCC= 3.0 V 9 All 1.0 12.0 ns 10, 11 1.0 15.0 VCC= 4.5 V 9 1.0 9.0 10, 11 1.0 11.5 tPLH14/ VCC= 3.0 V 9 1.0 13.0 10, 11 1.0 17.0 VCC= 4.5 V 9 1.0 9.0 10, 11 1.0 11.5 Propagation delay time, Sm to Z tPHL24/ CL= 50 pF RL= 500 See figure 4 VCC= 3.0 V 9 All 1.0 15.0 ns 10, 11 1.0
40、18.5 VCC= 4.5 V 9 1.0 11.0 10, 11 1.0 13.5 tPLH24/ VCC= 3.0 V 9 1.0 14.5 10, 11 1.0 18.0 VCC= 4.5 V 9 1.0 10.5 10, 11 1.0 12.5 Propagation delay time, output enable, OEto Z tPZH4/ CL= 50 pF RL= 500 See figure 4 VCC= 3.0 V 9 All 1.0 7.5 ns 10, 11 1.0 9.0 VCC= 4.5 V 9 1.0 6.0 10, 11 1.0 7.0 tPZL4/ VCC
41、= 3.0 V 9 1.0 8.0 10, 11 1.0 9.5 VCC= 4.5 V 9 1.0 6.0 10, 11 1.0 8.0 Propagation delay time, output disable, OEto Z tPHZ4/ CL= 50 pF RL= 500 See figure 4 VCC= 3.0 V 9 All 1.0 9.0 ns 10, 11 1.0 10.5 VCC= 4.5 V 9 1.0 8.0 10, 11 1.0 9.0 tPLZ4/ VCC= 3.0 V 9 1.0 8.0 10, 11 1.0 9.5 VCC= 4.5 V 9 1.0 7.0 10
42、, 11 1.0 8.0 See footnotes on next sheet. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87693 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electric
43、al performance characteristics Continued. 1/ VOHand VOLtests will be tested at VCC= 3.0 V and VCC= 4.5 V. All other voltages are guaranteed, but not tested. Limits shown apply to operation at VCC= 3.3 V 0.3 V and VCC= 5.0 V 0.5 V. Transmission driving tests are performed at VCC= 5.5 V with a 2 ms du
44、ration maximum. 2/ VIHand VILtests are guaranteed by the VOHand VOLtests. 3/ Power dissipation capacitance (CPD) determines both the dynamic power consumption (PD) and the dynamic current consumption (IS). Where: PD= (CPD+ CL) (VCC2)f + (ICCx VCC) IS= (CPD+ CL) VCCf + ICC. f is the frequency of the
45、input signal and CLis the external load capacitance. 4/ AC limits at VCC= 5.5 V are equal to the limits at VCC= 4.5 V and guaranteed by testing at VCC= 4.5 V. AC limits at VCC= 3.6 V are equal to the limits at VCC= 3.0 V and guaranteed by testing at VCC= 3.0 V. Minimum ac limits for VCC= 5.5 V are 1
46、.0 ns and guaranteed by guard-banding the VCC= 4.5 V minimum limits to 1.5 ns. Device type All Case outlines E and F 2 Terminal number Terminal symbol Terminal symbol 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 OEa S1 I3a I2a I1a I0a Za GND Zb I0b I1b I2b I3b S0 OEb VCC- - - - NC OEa S1 I3a I
47、2a NC I1a I0a Za GND NC Zb I0b I1b I2b NC I3b S0 OEb VCCNC = No connection FIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87693 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990
48、 REVISION LEVEL B SHEET 8 DSCC FORM 2234 APR 97 Select Inputs Data inputs 1/ Output enable inputs 1/ Output Zn 1/ S0 S1 I0nI1nI2nI3n OEn Z X X X X X X H Z L L L X X X L L L L H X X X L H H L X L X X L L H L X H X X L H L H X X L X L L L H X X H X L H H H X X X L L L H H X X X H L H H = High voltage level L = Low voltage level X = Irrelevant Z = High impedance 1/ n refers t
