1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Page 11: Correction to terminal connections. Editorial changes throughout. 88-05-11 M. A. Frye B Add one vendor, CAGE 54186 for devices 01, 02, and 03. Make changes to 1.3 and table I. Editorial changes throughout. 89-06-23 Wm. J. Johnson C Updat
2、e drawing to current requirements. drw 03-12-15 Raymond Monnin THE ORIGINAL FIRST PAGE OF THIS DRAWING HAS BEEN REPLACED. REV SHET REV C SHET 15 REV STATUS REV C C C C C C C C C C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Marcia B. Kelleher DEFENSE SUPPLY CENTER C
3、OLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Da DiCenzo COLUMBUS, OHIO 43216 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUIT, CMOS, DUAL, 8-BIT MULTIPLYING DIGITAL TO ANALOG AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APP
4、ROVAL DATE 87-12-02 CONVERTER, MONOLITHIC SILICON AMSC N/A REVISION LEVEL C SIZE A CAGE CODE 67268 5962-87701 SHEET 1 OF 15 DSCC FORM 2233 APR 97 5962-E556-03 DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited.Provided by IHSNot for ResaleNo reproduction or networking p
5、ermitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87701 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL C SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level
6、B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-87701 01 R A Drawing number Device type (see 1.2.1) Case outline (see 1.2.2) Lead finish (see 1.2.3) 1.2.1 Device types. The device types id
7、entify the circuit function as follows: Device type Generic number Circuit function 01 7528 CMOS dual 8-bit buffered DAC, 4 LSBs of gain error 02 7528 CMOS dual 8-bit buffered DAC, 2 LSBs of gain error 03 7528 CMOS dual 8-bit buffered DAC, 1 LSBs of gain error 1.2.2 Case outlines. The case outlines
8、are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style R GDIP1-T20 or CDIP2-T20 20 Dual-in-line 2 CQCC1-N20 20 Square leadless chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum r
9、atings. Supply voltage. +5 V dc to +15 V dc VDDto AGND. 0 V dc, +17 V dc VDDto DGND. 0 V dc, +17 V dc Digital input voltage to DGND . -0.3 V dc to +15 V dc VRFBA, VRFBB, to DGND . 25 V dc VREFA, VREFB, to AGND 25 V dc V pin 1 to DGND . -0.3 V dc to VDDV pin 2, V pin 20 to AGND -0.3 V dc to +15 V dc
10、AGND to DGND -0.3 V dc, VDD+ 0.3 V DGND to AGND +0.3 V dc Power dissipation (PD): Up to +75C. 450 mW Derate above +75C 6 mW/C Storage temperature range. -65C to +150C Lead temperature (soldering, 10 seconds). +300C Thermal resistance (JC) . See MIL-STD-1835 Thermal resistance (JA) . +120C 1.4 Recomm
11、ended operating conditions. Operating ambient temperature range (TA) -55C to +125C Supply voltage range (VDD) . +4.75 V dc to +5.25 V dc and +14.25 V dc to +15.75 V dc VREFDACA = VREFDACB. +10 V dc OUT DACA = OUT DACB 0 V dc Provided by IHSNot for ResaleNo reproduction or networking permitted withou
12、t license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87701 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL C SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and h
13、andbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those listed in the issue of the Department of Defense Index of Specifications and Standards (DoDISS) and supplement thereto, cited in the solicitation. SPECIFICATION DE
14、PARTMENT OF DEFENSE MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. STANDARDS DEPARTMENT OF DEFENSE MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. HANDBOOKS DEPARTMENT OF DEFENSE MIL-HDBK-103 - Li
15、st of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Unless otherwise indicated, copies of the specification, standards, and handbooks are available from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order
16、 of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Ite
17、m requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufac
18、turer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may mak
19、e modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option
20、 is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal conn
21、ections shall be as specified on figure 1. 3.2.3 Functional diagram and mode selection. The functional diagram and mode selection shall be as specified on figure 2. 3.2.4 Write cycle timing diagram. The write cycle timing diagram shall be as specified on figure 3. 3.3 Electrical performance characte
22、ristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full ambient operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The e
23、lectrical tests for each subgroup are described in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87701 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL C SHEET 4 DSCC FORM 22
24、34 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ -55C TA +125C unless otherwise specified Group A subgroups Device type Limits Unit Min MaxResolution RES VDD= +5 V 1, 2, 3 All 8 Bits VDD= +15 V 8 Relative accuracy 2/ RA VDD= +5 V 1, 2, 3 01 1 LSB 1 02 1 2, 3 0.5 V
25、DD= +5 V, TA= +25C 12 0.5 VDD= +5 V 1 03 1 2, 3 0.5 VDD= +5 V, TA= +25C 12 0.5 VDD= +15 V 1, 2, 3 01 1 1 02 1 2, 3 0.5 VDD= +15 V, TA= +25C 12 0.5 VDD= +15 V 1 03 1 2, 3 0.5 VDD= +15 V, TA= +25C 12 0.5 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitte
26、d without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87701 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL C SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - continued. Test Symbol Conditions 1/ -55C TA +125C unless otherwise
27、 specified Group A subgroups Device type Limits Unit Min MaxGain error 3/ AEDAC register loaded with VDD= +5 V 1 01 4 LSB 1111 1111 1111 2, 3 6 1, 2, 3 02 4 VDD= +5 V TA= +25C 12 2 VDD= +5 V 1 03 4 2, 3 3 VDD= +5 V TA= +25C 12 1 VDD= +15 V 1 01 4 2, 3 5 1 02 4 2, 3 3 VDD= +15 V TA= +25C 12 1 VDD= +1
28、5 V 1 03 4 2, 3 1 VDD= +15 V TA= +25C 12 1 Differential nonlinearity DNL VDD= +5 V, all grades guaranteed monotonic to 8-bits over operating temperature range 1, 2, 3 All 1 LSB VDD= +15 V, all grades guaranteed monotonic to 8-bits over operating temperature range 1, 2, 3 All 1 See footnotes at end o
29、f table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87701 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL C SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance character
30、istics - continued. Test Symbol Conditions 1/ -55C TA +125C unless otherwise specified Group A subgroups Device type Limits Unit Min MaxPower supply rejection gain/VDDPSRR VDD= 5% VDD= +5 V 1 All .02 %/% 2, 3 .04 VDD= +15 V 1 All .01 2, 3 .02 Output leakage current pin 2 IOLDAC latches loaded with V
31、DD= +5 V 1 All 50 nA 0000 0000 2, 3 400 VDD= +15 V 1 All 50 2, 3 200 Output leakage current pin 20 VDD= +5 V 1 All 50 2, 3 400 VDD= +15 V 1 All 50 2, 3 200 Reference input resistance RINVDD= +5 V 1, 2, 3 All 8 15 k VREFA, VREFBVDD= +15 V 8 15 Digital input high voltage VIHVDD= +5 V 1, 2, 3 All 2.4 V
32、 VDD= +15 V 13.5 Digital input low voltage VILVDD= +5 V 1, 2, 3 All 0.8 V VDD= +15 V 1.5 Digital input current IINVIN= 0 V or VDDVDD= +5 V 1 All 1 A 2, 3 10 VDD= +15 V 1 All 1 2, 3 10 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license
33、from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87701 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL C SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - continued. Test Symbol Conditions 1/ -55C TA +125C unless otherwise specified Group A
34、 subgroups Device type Limits Unit Min MaxSupply current from VDDIDDAll digital inputs = VILor VIHVDD= +5 V 1, 2, 3 All 2 mA VDD= +15 V 2 All digital inputs = 0 V or VDDVDD= +5 V 1 All 100 A 2, 3 500 VDD= +15 V 1 100 2, 3 500 Gain temperature coefficient AE/t 4/ VDD= +5 V 1, 3, 3 All 70 ppm/C VDD= +
35、15 V 35 Feedthrough error VREFAto OUTA FTREFAVREF= 10 V, 100 kHz VDD= +5 V 4, 5, 6 All -70 dB sinewave, DAC latches loaded VDD= +15 V -70 Feedthrough error VREFBto OUTB FTREFBwith 0000 0000 4/ 5/ VDD= +5 V 4, 5, 6 All -70 VDD= +15 V -70 Digital input capacitance CINTA= +25C DB0-DB7 6/ VDD= +5 V 4 Al
36、l 10 pF VDD= +15 V 20 VDD= +5 V 4 All 10 WR , CS , DACA /DACB TA= +25C 6/ VDD= +15 V 15 Output capacitance pin 2 COUTADAC latches loaded with VDD= +5 V 4 All 50 pF 0000 0000 TA= +25C 4/ VDD= +15 V 50 Output capacitance pin 20 COUTBVDD= +5 V 4 All 50 VDD= +15 V 50 See footnotes at end of table. Provi
37、ded by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87701 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL C SHEET 8 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - conti
38、nued. Test Symbol Conditions 1/ -55C TA +125C unless otherwise specified Group A subgroups Device type Limits Unit Min MaxOutput capacitance pin 2 COUTADAC latches loaded with VDD= +5 V 4 All 120 pF 1111 1111 TA= +25C 4/ VDD= +15 V 120 Output capacitance pin 20 COUTBVDD= +5 V 4 All 120 VDD= +15 V 12
39、0 Chip select to write setup time tCS7/ VDD= +5 V 9 All 200 ns 10, 11 230 VDD= +15 V 9 All 60 10, 11 80 Chip select to write hold time tCH7/ VDD= +5 V 9 All 20 ns 10, 11 30 VDD= +15 V 9 All 10 10, 11 15 Write pulse width tWRtCS tWR, 7/ tCH 0 VDD= +5 V 9 All 180 ns 10, 11 200 VDD= +15 V 9 All 60 10,
40、11 80 Data valid to write setup time tDS7/ VDD= +5 V 9 All 110 ns 10, 11 130 VDD= +15 V 9 All 50 10, 11 70 Data valid to write hold time tDH7/ VDD= +15 V 9, 10, 11 All 10 ns VDD= +15 V 9, 10, 11 All 10 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitte
41、d without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87701 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL C SHEET 9 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - continued. Test Symbol Conditions 1/ -55C TA +125C unless otherwise
42、 specified Group A subgroups Device type Limits Unit Min MaxData select to write setup time tAS7/ VDD= +5 V 9 All 200 ns 10, 11 230 VDD= +15 V 9 All 60 10, 11 80 Data select to write hold time tAH7/ VDD= +5 V 9 All 20 ns 10, 11 30 VDD= +15 V 9 All 10 10, 11 15 Reference input resistance match MINR 4
43、/ VDD= +5 V 1, 2, 3 All 1 % VREFVDD= +15 V 1, 2, 3 All 1 Channel-to-channel isolation VREFAto OUTB CHISOVREFA= 10 V, 100 kHz VDD= +5 V 4, 5, 6 All 60 dB sinewave, VREFB= 0 V 4/ VDD= +15 V 4, 5, 6 All 60 Channel-to-channel isolation VREFBto OUTA CHISOVREFB= 10 V, 100 kHz VDD= +5 V 4, 5, 6 All 60 dB s
44、inewave, VREFA= 0 V 4/ VDD= +15 V 4, 5, 6 All 60 Output current settling time tSL4/ VDD= +5 V 9, 10, 11 All 350 ns VDD= +15 V 9, 10, 11 All 180 1/ VOUT1= 0 V; VREF= +10 V, AGND = DGND unless otherwise specified. 2/ See 4.3.1d. 3/ Measured using internal RFBA and RFBB. Gain error is adjustable. 4/ Gu
45、aranteed if not tested. 5/ Feedthrough error can be reduced by connecting the metal lid to ground. 6/ See 4.3.1c. 7/ Timing in accordance with figure 3. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87701 D
46、EFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL C SHEET 10 DSCC FORM 2234 APR 97 Device type All Case outline 2 and R Terminal number Terminal symbol 1 AGND 2 OUTA 3 RFBA4 VREFA5 DGND 6 DACA /DACB 7 (MSB) DB7 8 DB6 9 DB5 10 DB4 11 DB3 12 DB2 13 DB1 14 DB0 (LSB) 15 CS 16 WR 17
47、VDD18 VREFB19 RFBB20 OUTB FIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87701 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL C SHEET 11 DSCC FORM 223
48、4 APR 97 Mode selection table DACA /DACB CS WR DACA DACB L L L Write Hold H L L Hold WriteX H X Hold Hold X X H Hold HoldL = Low state H = High state X = Dont care FIGURE 2. Functional diagram and mode selection. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87701 DEFENSE SUPPLY CENTER CO
