1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with N.O.R. 5962-R151-92. 92-04-15 M. A. FRYE B Add device class V devices. Redrawn. - ro 00-11-09 R. MONNIN C Update boilerplate to reflect current requirements. -rrp 03-04-22 R. MONNIN D Update drawing as part of 5 year re
2、view. - jt 10-12-08 C. SAFFLE REV SHEET REV SHEET REV STATUS REV D D D D D D D D D D D D D OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 PMIC N/A PREPARED BY MARCIA B. KELLEHER DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILA
3、BLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE CHECKED BY RAY MONNIN APPROVED BY MICHAEL A. FRYE MICROCIRCUIT, LINEAR, HIGH EFFICIENCY LINEAR REGULATOR, MONOLITHIC SILICON DRAWING APPROVAL DATE 88-03-24 AMSC N/A REVISION LEVEL D SIZE A CAGE CODE 67268 5962-87742 SHEET 1 OF
4、13 DSCC FORM 2233 APR 97 5962-E085-11 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87742 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. T
5、his drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Ra
6、diation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following examples. For device classes M and Q: 5962 - 87742 01 E X Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2) Case outline (see 1.2.4) Lead finish (see 1.2.5)
7、/ / Drawing number For device class V: 5962 - 87742 01 V E X Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2) Device class designator Case outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA mark
8、ed devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device
9、 type. The device type identify the circuit function as follows: Device type Generic number Circuit function 01 1834 High efficiency linear regulator 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as listed below. Since the devic
10、e class designator has been added after the original issuance of this drawing, device classes M and Q designators will not be included in the PIN and will not be marked on the device. Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compl
11、iant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87742 DLA LAND AN
12、D MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 3 DSCC FORM 2234 APR 97 1.2.4 Case outlines. The case outlines are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 Dual-in-line 2 CQCC1-N20 20 Square le
13、adless chip carrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. 1.3 Absolute maximum ratings. 1/ 2/ Input supply voltage (+VIN) 40 V dc Driver current . 400 mA Driver source to sink voltage 40 V dc Cr
14、owbar current . -200 mA +1.5 V reference output current . -10 mA Fault alert voltage 40 V dc Fault alert current . 15 mA Error amplifier inputs -0.5 V dc to +35 V dc Current sense inputs -0.5 V dc to +40 V dc 0 V latch output voltage . -0.5 V dc to +40 V dc 0 V latch output current 15 mA Power dissi
15、pation (PD): TA= +50C 1000 mW 3/ TC= +25C 2000 mW 4/ Storage temperature range -65C to +150C Lead temperature (soldering, 10 seconds) +300C Junction temperature (TJ) . +150C Thermal resistance, junction-to-ambient (JA): Case E . 80C/W Case 2 . 70C/W Thermal resistance, junction-to-case (JC): Cases E
16、 and 2 See MIL-STD-1835 1.4 Recommended operating conditions. Ambient operating temperature range (TA) . -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent speci
17、fied herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/
18、Voltages are referenced to pin 5 (-VIN). Currents are positive into, negative out of the specified terminals. 3/ Derate above TA= +50C at 10 mW/C for case E and derate above TA= +40C at 9 mW/C for case 2. 4/ Derate above TC= +25C at 16 mW/C for case E and derate above TC= +120C at 67 mW/C for case 2
19、. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87742 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 4 DSCC FORM 2234 APR 97 SPECIFICATION DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF
20、-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit
21、 Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event o
22、f a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual
23、 item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual ite
24、m requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein fo
25、r device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Logic diagrams. The logic diagrams shall
26、 be as specified on figure 2 . 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full ambient operati
27、ng temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer
28、s PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classe
29、s Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for
30、device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device
31、class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply for this drawing s
32、hall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-
33、,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87742 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ -55C TA +125C unless otherwise specified Group A subgroups Device type Limits Un
34、it Min Max Standby supply current ISBY1,2,3 01 7.0 mA +1.5 V Reference section Output voltage VOUT1-55C TJ +125C 1 01 1.485 1.515 V 2,3 1.47 1.53 Line regulation VRLINE1+VIN= 5.0 V to 35 V 1,2,3 01 10 mV Load regulation VRLOAD1IOUT= 0 mA to 2.0 mA 1,2,3 01 10 mV -2.0 V Reference section 2/ Output vo
35、ltage (referenced to +VIN) VOUT2-55C TJ +125C 1 01 2.04 1.96 V 2,3 2.06 1.94 Line regulation VRLINE2+VIN= 5.0 V to 35 V 1,2,3 01 15 mV Error amplifier section Input offset voltage VOSVCM= 1.5 V 1,2,3 01 6.0 mV Input bias current IIB1VCM= 1.5 V 1,2,3 01 -4.0 A Input offset current IOSVCM= 1.5 V 1,2,3
36、 01 1.0 A Small signal open loop gain AVOL COMPENSATION / SHUTDOWN pin is output, DIVER SINK pin is +VIN, DRIVER SOURCE pin is connected through 20 resistor to -VIN4,5,6 01 50 dB Common mode rejection ratio CMRR VCM= 0.5 V to 33 V, +VIN= 35 V 4,5,6 01 60 dB Power supply rejection ratio PSRR +VIN= 5.
37、0 V to 35 V, VCM= 1.5 V 4,5,6 01 70 dB See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87742 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 6 DSCC FORM 2
38、234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Conditions 1/ -55C TA +125C unless otherwise specified Group A subgroups Device type Limits Unit Min Max Driver section 3/ Maximum output current IOUT(max) 1,2,3 01 200 mA Saturation voltage VSATIOUT= 100 mA 1,2,3 01 1
39、.2 V Output leakage current ILODRIVER SINK pin is 35 V, DRIVER SOURCE pin is -VIN, COMPENSATION / SHUTDOWN pin is -VIN1,2,3 01 50 A Shutdown input voltage at COMPENSATION / SHUTDOWN pin VIN(SHTDN) IOUT 100 A, DRIVER SOURCE pin is -VIN, DRIVER SINK pin is +VIN1,2,3 01 0.4 V Shutdown input current at
40、COMPENSATION / SHUTDOWN pin IIN(SHTDN) IOUT 100 A, COMPENSATION / SHUTDOWN pin is -VIN, DRIVER SINK pin is +VIN, DRIVER SOURCE pin is -VIN1,2,3 01 -150 A Fault amplifier section Under-and over-voltage fault threshold VTH1VCM= 1.5 V, at E/A inputs 1,2,3 01 120 180 mV Common-mode sensitivity VCMS+VIN=
41、 35 V, VCM= 1.5 V to 33 V 1,2,3 01 -0.8 %/V Supply sensitivity VSSVCM= 1.5 V, +VIN= 5.0 V to 35 V 1,2,3 01 -1.0 %/V Fault delay tFD 9,10,11 01 30 60 ms/F See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIR
42、CUIT DRAWING SIZE A 5962-87742 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Conditions 1/ -55C TA +125C unless otherwise specified Group A subgroups Device type Limits Unit Min Ma
43、x Fault amplifier section continued. Fault alert output current at FAULT ALERT pin IOUT1,2,3 01 2.0 mA Fault alert saturation voltage at FAULT ALERT pin VSATIOUT= 1.0 mA 1,2,3 01 0.5 V 0 V latch current at 0 V LATCH OUTPUT / RESET pin IOUT1,2,3 01 2.0 mA 0 V latch saturation voltage at 0 V LATCH OUT
44、PUT / RESET pin VSATIOUT= 1.0 mA 1,2,3 01 1.3 V 0 V latch output reset voltage VRESET1,2,3 01 0.3 0.6 V Crowbar gate current at CROWBAR GATE pin IOUT1,2,3 01 -100 mA Crowbar gate leakage current at CROWBAR GATE pin ILO+VIN= 35 V, CROWBAR GATE pin is -VIN1,2,3 01 -50 A Current sense amplifier section
45、 Threshold voltage VTH2THRESHOLD ADJ pin is open, VCM= +VINor -VIN1,2,3 01 130 170 mV THRESHOLD ADJ pin is 0.5 V, VCM= +VINor -VIN40 60 Threshold supply sensitivity VTH2/ +VIN+VIN= 5.0 V to 35 V, THRESHOLD ADJ pin is open, VCM= -VIN1,2,3 01 -0.3 %/V Adjustment input current IINTHRESHOLD ADJ pin is 0
46、.5 V 1,2,3 01 -10 A See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87742 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 8 DSCC FORM 2234 APR 97 TABLE I.
47、 Electrical performance characteristics Continued. Test Symbol Conditions 1/ -55C TA +125C unless otherwise specified Group A subgroups Device type Limits Unit Min Max Current sense amplifier section continued. Sense input bias current IIB2VCM= +VIN1,2,3 01 200 A VCM= -VIN-200 1/ Unless otherwise sp
48、ecified, +VIN= 15 V, -VIN= 0 V, and TA= -55C to +125C. 2/ When using both the 1.5 V and 2.0 V reference, the current out of +1.5 V REF pin should be balanced by an equivalent current into 2.0 V REF pin. The 2.0 V output will change 2.3 mV per A imbalance. 3/ The driver section contains a thermal shutdown which turns the driver off at approximately +165C. If 0 V LATCH OUTPUT pin is tied to the COMPENSATION / SHUTDOWN pin, the 0 V latch will be reset. 3.7
