DLA SMD-5962-87759 REV F-2013 MICROCIRCUIT DIGITAL ADVANCED CMOS RADIATION HARDENED OCTAL BUFFER LINE DRIVER WITH THREE-STATE OUTPUTS TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf

上传人:confusegate185 文档编号:699154 上传时间:2019-01-01 格式:PDF 页数:26 大小:272.88KB
下载 相关 举报
DLA SMD-5962-87759 REV F-2013 MICROCIRCUIT DIGITAL ADVANCED CMOS RADIATION HARDENED OCTAL BUFFER LINE DRIVER WITH THREE-STATE OUTPUTS TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf_第1页
第1页 / 共26页
DLA SMD-5962-87759 REV F-2013 MICROCIRCUIT DIGITAL ADVANCED CMOS RADIATION HARDENED OCTAL BUFFER LINE DRIVER WITH THREE-STATE OUTPUTS TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf_第2页
第2页 / 共26页
DLA SMD-5962-87759 REV F-2013 MICROCIRCUIT DIGITAL ADVANCED CMOS RADIATION HARDENED OCTAL BUFFER LINE DRIVER WITH THREE-STATE OUTPUTS TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf_第3页
第3页 / 共26页
DLA SMD-5962-87759 REV F-2013 MICROCIRCUIT DIGITAL ADVANCED CMOS RADIATION HARDENED OCTAL BUFFER LINE DRIVER WITH THREE-STATE OUTPUTS TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf_第4页
第4页 / 共26页
DLA SMD-5962-87759 REV F-2013 MICROCIRCUIT DIGITAL ADVANCED CMOS RADIATION HARDENED OCTAL BUFFER LINE DRIVER WITH THREE-STATE OUTPUTS TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf_第5页
第5页 / 共26页
点击查看更多>>
资源描述

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add B, S, Q, and V test limits. Change to one part-one part number format. Add ground bounce and latch-up immunity tests. Add 10.1, substitution statement. Changes to table I. Editorial changes throughout. - JAK 92-07-09 Monica L. Poelking B Chan

2、ge delay time for tPLZand tPHZfor device class M. Editorial changes throughout. - JAK 99-02-02 Monica L. Poelking C Add device type 03. Add vendor CAGE F8859. Add case outlines X and Z. Make changes to radiation features. Update boilerplate to MIL-PRF-38535 requirements. - JAK 02-12-17 Thomas M. Hes

3、s D Add radiation features for device type 03 in section 1.5. Update the boilerplate to include radiation hardness assurance for device type 03. Editorial changes throughout. - TVN 05-05-20 Thomas M. Hess E Update radiation features in section 1.5. Add SEP table IB and paragraph 4.4.5.2. Update the

4、boilerplate paragraphs to current MIL-PRF-38535 requirements. - MAA 11-09-21 Thomas M. Hess F Change case outline X (flat pack) dimension A and add dimensions E2 and E3 to figure 1. - MAA 13-07-29 Thomas M. Hess REV SHEET REV F F F F F F F F F F SHEET 15 16 17 18 19 20 21 22 23 24 REV STATUS OF SHEE

5、TS REV F F F F F F F F F F F F F F SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Jim Nicklaus DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTM

6、ENT OF DEFENSE AMSC N/A CHECKED BY D. A. DiCenzo APPROVED BY Michael A. Frye MICROCIRCUIT, DIGITAL, ADVANCED CMOS, RADIATION HARDENED, OCTAL BUFFER/LINE DRIVER WITH THREE-STATE OUTPUTS, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON DRAWING APPROVAL DATE 88-08-10 REVISION LEVEL F SIZE A CAGE CODE 67268 5

7、962-87759 SHEET 1 OF 24 DSCC FORM 2233 APR 97 5962-E458-13 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 5962-87759 REVISION LEVEL F SHEET 2 DSCC FORM 2234 APR 97

8、1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes B, Q, and M) and space application (device classes S and V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN

9、). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 R 87759 01 S R A Federal RHA Device Device Case Lead stock class designator type class outline finish designator (see 1.2.1) (see 1.2.2) desig

10、nator (see 1.2.4) (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes B, S, Q, and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A spe

11、cified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54ACT240 Octal buffer/line driver with inverting three-state

12、outputs, TTL compatible inputs 02 54ACT11240 Octal buffer/line driver with inverting three-state outputs, TTL compatible inputs 03 54ACT240 Octal buffer/line driver with inverting three-state outputs, TTL compatible inputs 1.2.3 Device class designator. The device class designator is a single letter

13、 identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A B, S, Q, or V Certification and qualificatio

14、n to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style R GDIP1-T20 or CDIP2-T20 20 Dual-in-line S GDFP2-F20 or CDFP3-F20 20 Flat pack L GDIP3-T24 or CDIP4-T24 24 Dual-in-line X See

15、figure 1 20 Flat pack Z GDFP1-G20 20 Flat pack with gullwing 2 CQCC1-N20 20 Square leadless chip carrier 3 CQCC1-N28 28 Square leadless chip carrier Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME C

16、OLUMBUS, OHIO 43218-3990 SIZE A 5962-87759 REVISION LEVEL F SHEET 3 DSCC FORM 2234 APR 97 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes B, S, Q, and V or MIL-PRF-38535, appendix A for device class M. 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range

17、 (VCC) -0.5 V dc to +6.0 V dc DC input voltage range (VIN) -0.5 V dc to VCC + 0.5 V dc DC output voltage range (VOUT) . -0.5 V dc to VCC+ 0.5 V dc Clamp diode current (IIK, IOK) . 20 mA DC output current (IOUT) . 50 mA DC VCCor GND current (ICC, IGND) . 200 mA 4/ Maximum power dissipation (PD) . 500

18、 mW Storage temperature range (TSTG) . -65C to +150C Lead temperature (soldering, 10 seconds): Case outline X . +260C All other case outlines except case X +300C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) 175C 1.4 Recommended operating conditions. 2/ 3/ Su

19、pply voltage range (VCC) +4.5 V dc to +5.5 V dc Input voltage range (VIN) 0.0 V dc to VCCOutput voltage range (VOUT). 0.0 V dc to VCCMinimum high level input voltage (VIH) . 2.0 V at VCC= 4.5 V and 5.5 V Maximum low level input voltage (VIL) 0.8 V at VCC= 4.5 V and 5.5 V Maximum high level output cu

20、rrent (IOH) -24 mA Maximum low level output current (IOL) +24 mA Maximum input rise or fall time rate (t/v): VCC= 4.5 V 10 ns/V VCC= 5.5 V 8 ns/V Case operating temperature range (TC) . -55C to +125C 1.5 Radiation features. Device type 01: Maximum total dose available (dose rate = 50 300 rads (Si)/s

21、) 100 krads (Si) Device type 03: Maximum total dose available (dose rate = 50 300 rads (Si)/s) 300 krads (Si) Single event phenomenon (SEP): For device type 01: No Single event latch-up (SEL) occurs at effective LET (see 4.4.5.2) 100 MeV-cm2/mg For device type 03: No Single event latch-up (SEL) occu

22、rs at effective LET (see 4.4.5.2) 93 MeV-cm2/mg 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. The maximum junction temperature shall not be exceeded except for allowable

23、 short duration burn-in screening conditions in accordance with method 5004 of MIL-STD-883. 2/ Unless otherwise specified, all voltages are referenced to GND. 3/ The limits for the parameters specified herein shall apply over the full specified VCCrange and case temperature range of -55C to +125C. 4

24、/ For packages with multiple VCCor GND pins, this value represents the maximum total current flowing into or out of all VCCor GND pins. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO

25、 43218-3990 SIZE A 5962-87759 REVISION LEVEL F SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, t

26、he issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface

27、Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/quicksearch.dla.mil/ or from the Standardization Document Order

28、Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. ASTM

29、 INTERNATIONAL (ASTM) ASTM F1192 - Standard Guide for the Measurement of Single Event Phenomena (SEP) Induced by Heavy Ion Irradiation of semiconductor Devices. (Copies of these documents are available online at http:/www.astm.org or from ASTM International, 100 Barr Harbor Drive, P.O. Box C700, Wes

30、t Conshohocken, PA, 19428-2959). JEDEC SOLID STATE TECHNOLOGY ASSOCIATION (JEDEC) EIA/JEDEC Standard JESD78 - IC Latch-up Test JEDEC Standard JESD20 - Standard for Description of 54/74ACXXXX and 54/74ACTXXXX Advanced High-Speed CMOS Devices. (Copies of these documents are available online at http:/w

31、ww.jedec.org or from JEDEC Solid State Technology Association, 3103 North 10th Street, Suite 240S, Arlington, VA 22201.) 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this do

32、cument, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes B, S, Q, and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the

33、 device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as spec

34、ified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes B, S, Q, and V or MIL-PRF-38535, appendix A and herein for device class M. Provided by IHSNot for ResaleNo reproduct

35、ion or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 5962-87759 REVISION LEVEL F SHEET 5 DSCC FORM 2234 APR 97 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 and figure 1 herein. 3.2.2

36、Terminal connections. The terminal connections shall be as specified on figure 2. 3.2.3 Truth table. The truth table shall be as specified on figure 3. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 4. 3.2.5 Ground bounce load circuit and waveforms. The ground bounce load cir

37、cuit and waveforms shall be as specifed on figure 5. 3.2.6 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 6. 3.2.7 Radiation exposure circuit. The radiation exposure circuit shall be maintained by the manufacturer under document revisio

38、n level control and shall be made available to the preparing or acquiring activity upon request. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and post irradiation parameter limits are as

39、 specified in table IA and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table IA. 3.5 Marking. The part shall be marke

40、d with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, t

41、he RHA designator shall still be marked. Marking for device classes B, S, Q, and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes B, S, Q, and

42、V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes B, S, Q, and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer

43、 in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DLA L

44、and and Maritime-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes B, S, Q, and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.

45、7 Certificate of conformance. A certificate of conformance as required for device classes B, S, Q, and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For

46、device class M, notification to DLA Land and Maritime-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DLA Land and Maritime, DLA Land and Mari

47、times agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices co

48、vered by this drawing shall be in microcircuit group number 37 (see MIL-PRF-38535, appendix A). 3.11 Substitution. Substitution data shall be as indicated in the appendix herein. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 5962-87759 REVISION LEVEL F SHEET 6 DSCC FORM 2234 APR 97 TABLE IA. Electrical performance characteristics. Test and MIL-STD-883 test method 1/ Symbol Test conditions 2/ 3/ -55C TC +125C +4.5 V VCC +5.5 V unless other

展开阅读全文
相关资源
猜你喜欢
相关搜索

当前位置:首页 > 标准规范 > 国际标准 > 其他

copyright@ 2008-2019 麦多课文库(www.mydoc123.com)网站版权所有
备案/许可证编号:苏ICP备17064731号-1