1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Added device type 02. Added CAGE 75569. Added case outline S. Change figure 2. Made technical change to table I. Added test circuit to figure 3. 89-05-03 M. A. Frye B Added device type 03. Technical changes in table I. Editorial changes throughou
2、t. 90-05-10 M. A. Frye C Update the boilerplate to current requirements as specified in MIL-PRF-38535. Editorial changes throughout. jak 06-07-12 Thomas M. Hess D Add footnote 4/ to ICCin table I. jak 10-01-06 Thomas M. Hess REV SHET REV SHET REV STATUS REV D D D D D D D D D D D OF SHEETS SHEET 1 2
3、3 4 5 6 7 8 9 10 11 PMIC N/A PREPARED BY Marcia B. Kelleher DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil STANDARD MICROCIRCUIT DRAWING CHECKED BY Thomas J. Ricciuti THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUIT, DIGIT
4、AL, FAST CMOS, 8-BIT IDENTITY COMPARATOR, TTL COMPATIBLE, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 88-08-23 AMSC N/A REVISION LEVEL D SIZE A CAGE CODE 67268 5962-88543 SHEET 1 OF 11 DSCC FORM 2233 APR 97 5962-E074-10 Provided by IHSNot for ResaleNo reproduct
5、ion or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88543 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, n
6、on-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-88543 01 R A Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). T
7、he device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54FCT521 8-bit identity comparator, TTL compatible 02 54FCT521A 8-bit identity comparator, TTL compatible 03 54FCT521B 8-bit identity comparator, TTL compatible 1.2.2 Case outline(s). The case
8、outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style R GDIP1-T20 or CDIP2-T20 20 Dual-in-line S GDFP2-F20 or CDFP3-F20 20 Flat pack 2 CQCC1-N20 20 Square leadless chip carrier 1.2.3 Lead finish. The lead finish is as specified in
9、MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) . -0.5 V dc to +7.0 V dc DC input voltage range (VIN) 2/ -0.5 V dc to VCC + 0.5 V dc DC output voltage range (VOUT) 2/ . -0.5 V dc to VCC+ 0.5 V dc DC input diode current (IIK) . -20 mA DC output diode current (IO
10、K) -50 mA DC output current (IOUT) 100 mA Maximum power dissipation (PD) 3/ . 500 mW Thermal resistance, junction-to-case (JC) See MIL-STD-1835 Storage temperature range (TSTG) -65C to +150C Junction temperature (TJ) . +175C Lead temperature (soldering, 10 seconds) . +300C 1.4 Recommended operating
11、conditions. Supply voltage range (VCC) . +4.5 V dc to +5.5 V dc Maximum low level input voltage (VIL). 0.8 V dc Minimum high level input voltage (VIH) 2.0 V dc Case operating temperature range (TC) -55C to +125C 1/ Unless other wise specified, all voltages are referenced to ground. 2/ For VCC 6.5 V
12、dc, the upper bound is limited to VCC. 3/ Must withstand the added PDdue to short circuit test, e.g., IOS. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88543 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 4
13、3218-3990 REVISION LEVEL D SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these d
14、ocuments are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic
15、Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at httpS:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 7
16、00 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations
17、 unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manuf
18、acturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535.
19、This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accorda
20、nce with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in acco
21、rdance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuit
22、. The switching waveforms and test circuit shall be as specified on figure 4. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Elec
23、trical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SI
24、ZE A 5962-88543 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 4 DSCC FORM 2234 APR 97 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also
25、be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compl
26、iance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in
27、 order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requiremen
28、ts herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects thi
29、s drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo re
30、production or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88543 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC+125C
31、 VCC= 5.0 V dc 10% unless otherwise specified Device type VCCGroup A subgroups Limits Unit Min Max High level output voltage VOHVIL= 0.8 V VIH= 2.0 V IOH= -300 A All 4.5 V 1, 2, 3 4.3 V VIL= 0.8 V VIH= 2.0 V IOH= -12 mA All 4.5 V 2.4 Low level output voltage VOLVIL= 0.8 V VIH= 2.0 V IOL= 300 A All 4
32、.5 V 1, 2, 3 0.2 V VIL= 0.8 V VIH= 2.0 V IOL= 32 mA All 4.5 V 0.5 Input clamp voltage VIKIIN= -18 mA All 4.5 V 1 -1.2 V High level input current IIHVIN= 5.5 V All 5.5 V 1, 2, 3 5.0 A Low level input current IILVIN= GND All 5.5 V 1, 2, 3 -5.0 A Short circuit output current IOSVOUT= 0.0 V 1/ All 5.5 V
33、 1, 2, 3 -60 mA Quiescent power supply current (CMOS inputs) ICCQVIN 0.2 V or VIN 5.3 V fi= 0 MHz All 5.5 V 1, 2, 3 1.5 mA Quiescent power supply current (TTL inputs) ICC2/ VIN= 3.4 V All 5.5 V 1, 2, 3 2.0 mA Dynamic power supply current ICCD3/ 4/ VIN 0.2 V or VIN 5.3 V Outputs open One bit toggling
34、 50% duty cycle All 5.5 V 3/ 0.25 mA/ MHz Total power supply current ICC4/ 5/ VIN 0.2 V or VIN 5.3 V Outputs open One bit toggling 50% duty cycle fCP= 10 MHz All 5.5 V 1, 2, 3 4.0 mA VIN= 3.4 V or VIN= GND Outputs open One bit toggling 50% duty cycle fCP= 10 MHz All 5.5 V 1, 2, 3 5.0 mA Input capaci
35、tance CINSee 4.3.1c All 4 10 pF Output capacitance COUTSee 4.3.1c All 4 12 pF Functional tests See 4.3.1d All 7, 8 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88543 DEFENSE
36、SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued Test Symbol Conditions -55C TC+125C VCC= 5.0 V dc 10% unless otherwise specified Device type VCCGroup A subgroups Limits Unit Min Max Propagatio
37、n delay time, An, Bn to O (A = B) tPLH1, tPHL16/ CL= 50 pF RL= 500 See figure 4 01 5.0 V 9, 10, 11 1.5 15 ns 02 1.5 9.503 1.5 7.3Propagation delay time, I (A = B) to O (A = B) tPLH2, tPHL26/ CL= 50 pF RL= 500 See figure 4 01 5.0 V 9, 10, 11 1.5 9.0 ns 02 1.5 7.803 1.5 6.01/ Not more than one output
38、should be shorted at one time and the duration of the short circuit condition should not exceed 1 second. 2/ TTL driven input (VIN= 3.4 V); all other inputs at VCCor GND. 3/ This parameter is not directly testable but is derived for use in total power supply calculations. 4/ For ICCtests, in an ATE
39、environment, the effect of parasitic output capacitive loading from the test environment must be taken into account,as its effect is not intended to be included in the test results. The impact must be characterized and appropriate offsetfactors must be applied to the test result.“ 5/ ICC= ICCQ+ (ICC
40、x DHx NT) + (ICCDx fIx NI), where: DH= Duty cycle for TTL inputs high. NT= Number of TTL inputs at DH.fI= Input frequency in MHz. NI= Number of inputs at fI. 6/ Minimum limits shall be guaranteed, if not tested, to the limits specified in table I. Provided by IHSNot for ResaleNo reproduction or netw
41、orking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88543 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 7 DSCC FORM 2234 APR 97 Device types 01, 02, and 03 Case outlines R, S, and 2 Terminal number Terminal symbol 1 2 3 4 5 6 7 8
42、9 10 11 12 13 14 15 16 17 18 19 20 I (A = B) A0 B0 A1 B1 A2 B2 A3 B3 GND A4 B4 A5 B5 A6 B6 A7 B7 O (A = B) VCCTerminal symbol Description A0 A7 Word A inputs B0 B7 Word B inputs I (A = B) Enable input (active low) O (A = B) Identity output (active low) FIGURE 1. Terminal connections. Provided by IHS
43、Not for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88543 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 8 DSCC FORM 2234 APR 97 Device types 01, 02, and 03 Inputs Output Data A, B Enable I (A =
44、 B) O (A = B) A = B* L L A B L H A = B* H H A B H H L = Low voltage level H = High voltage level * = A0 = B0, A1 = B1, A2 = B2, etc. FIGURE 2. Truth table. FIGURE 3. Logic diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT
45、 DRAWING SIZE A 5962-88543 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 9 DSCC FORM 2234 APR 97 NOTES: 1. CL= 50 pF or equivalent (includes test jig and probe capacitance). 2. RL= 500 or equivalent. 3. RT= 50 or equivalent, terminal resistance which should be equal
46、 to ZOUTof the pulse generator. 4. Pulse generator for all inputs: tr 2.5 ns; tf 2.5 ns. FIGURE 4. Switching waveforms and test circuit. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88543 DEFENSE SUPPLY CE
47、NTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 10 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-8
48、83, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicabl
