1、REVISIONSLTR DESCRIPTIONDATE (YR-MO-DA)APPROVEDA Table I, change I . Change table I footnotes. CCTChange figure 3.88-11-17 Mike A. FryeB Add group C to 4.2.a(1) and 4.3.a(1). Editorial changes throughout.90-07-13 Don CoolC Inactivate device 02. Table I, correct I ,CCQI . Add devices 03 and 04. Edito
2、rial changesCCTthroughout.92-06-22 Tim NohTHE ORIGINAL FIRST PAGE OF THIS DRAWING HAS BEEN REPLACEDREV SHEETREVC C C CSHEET15 16 17 18REV STATUSOF SHEETSREVC C C C C C C C C C C C C CSHEET1 2 3 4 5 6 7 8 91011121314PMIC N/APREPARED BY Greg A. PitzDEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444
3、STANDARDIZEDMILITARYDRAWINGTHIS DRAWING ISAVAILABLEFOR USE BY ALLDEPARTMENTSAND AGENCIES OF THEDEPARTMENT OF DEFENSEAMSC N/A CHECKED BY David H. JohnsonMICROCIRCUIT, DIGITAL CMOS, HIGHPERFORMANCE PARITY BUS TRANSCEIVERS,MONOLITHIC SILICONAPPROVED BY Michael A. FryeDRAWING APPROVAL DATE88-04-20SIZEAC
4、AGE CODE672685962-88573REVISION LEVELCSHEET 1 OF 18DESC FORM 193JUL 91 5962-E491DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited.Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARDIZEDMILITARY DRAWINGDEFENSE ELECT
5、RONICS SUPPLY CENTERDAYTON, OHIO 45444SIZEA5962-88573REVISION LEVELCSHEET2DESC FORM 193AJUL 911. SCOPE1.1 Scope. This drawing describes device requirements for class B microcircuits in accordance with1.2.1 of MIL-STD-883, “Provisions for the use of MIL-STD-883 in conjunction with compliant non-JANde
6、vices“.1.2 Part or Identifying Number (PIN). The complete PIN shall be as shown in the following example:5962-88573 01 K X G0D G0D G0D G0DG0D G0D G0D G0DG0D G0D G0D G0DG0D G0D G0D G0D Drawing number Device type Case outline Lead finish per(1.2.1) (1.2.2) MIL-M-385101.2.1 Device types. The device typ
7、es shall identify the circuit function as follows:Device type Generic number Circuit function01 29C853 High performance CMOS parity bus transceiver02 1/ 29C855 High performance CMOS parity bus transceiver03 29C853A High performance CMOS parity bus transceiver with latch option04 29C833A High perform
8、ance CMOS parity bus transceiver1.2.2 Case outlines. The case outlines shall be as designated in appendix C of MIL-M-38510, and asfollows:Outline letter Case outlineK F-6 (24-lead, .640“ x .420“ .090“), flat packageL D-9 (24-lead, 1.280“ x .310“ x .200“), dual-in-line package3 C-4 (28-terminal, .460
9、“ x .460“ x .100“), square chip carrier package1.3 Absolute maximum ratings.Supply voltage range - - - - - - - - - - - - - - - - - - - - - - - -0.5 V dc to +7.0 V dcInput voltage range - - - - - - - - - - - - - - - - - - - - - - - -0.5 V dc to V + 0.5 V dcCCStorage temperature range - - - - - - - -
10、- - - - - - - - - - - - -65G28C to +150G28CMaximum power dissipation (P ) 2/ - - - - - - - - - - - - - - - - 500 mWDLead temperature (soldering, 10 seconds) - - - - - - - - - - - - - +300G28CThermal resistance, junction-to-case (G14 ):JCCases K, L, and 3 - - - - - - - - - - - - - - - - - - - - - - -
11、 See MIL-M-38510, appendix CJunction temperature (T ) - - - - - - - - - - - - - - - - - - - - 150G28CJDC output voltage range - - - - - - - - - - - - - - - - - - - - - -0.5 V dc to V +0.5 V dcCCDC output diode current:Into output - - - - - - - - - - - - - - - - - - - - - - - - - - +50 mAOut of outpu
12、t - - - - - - - - - - - - - - - - - - - - - - - - - -50 mADC input diode current:Into input - - - - - - - - - - - - - - - - - - - - - - - - - - - +20 mAOut of input - - - - - - - - - - - - - - - - - - - - - - - - - - -20 mADC output current per pin:I :sink(Devices 01 and 02) - - - - - - - - - - - -
13、- - - - - - - +48 mA (2 x I )OL(Devices 03 and 04) - - - - - - - - - - - - - - - - - - - +100 mA (2 x I )OLI :source(Devices 01 and 02) - - - - - - - - - - - - - - - - - - - -30 mA (2 x I )OH(Devices 03 and 04) - - - - - - - - - - - - - - - - - - - -100 mA (2 x I )OHTotal dc ground current 3/ - - -
14、- - - - - - - - - - - - - - - - (n x I + m x I ) mAOL CCTTotal dc V current 3/ - - - - - - - - - - - - - - - - - - - - - (n x I + m x I ) mACC OH CCT1/ Not available from an approved source of supply.2/ Must withstand the added P due to short circuit test (e.g., I ).DOS3/ n = number of outputs, m =
15、number of inputsProvided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARDIZEDMILITARY DRAWINGDEFENSE ELECTRONICS SUPPLY CENTERDAYTON, OHIO 45444SIZEA5962-88573REVISION LEVELCSHEET3DESC FORM 193AJUL 911.4 Recommended operating conditions.Supply voltage
16、 range (V ) - - - - - - - - - - - - - - - - - - - - +4.5 V dc to +5.5 V dcCCMinimum high-level input voltage (V ) - - - - - - - - - - - - - - 2.0 V dcIHMaximum low-level input voltage (V ) - - - - - - - - - - - - - - 0.8 V dcILCase operating temperature range (T ) - - - - - - - - - - - - - - -55G28C
17、 to +125G28CC2. APPLICABLE DOCUMENTS2.1 Government specification, standard, and bulletin. Unless otherwise specified, the followingspecification, standard, and bulletin of the issue listed in that issue of the Department of Defense Indexof Specifications and Standards specified in the solicitation,
18、form a part of this drawing to the extentspecified herein.SPECIFICATIONMILITARYMIL-M-38510 - Microcircuits, General Specification for.STANDARDMILITARYMIL-STD-883 - Test Methods and Procedures for Microelectronics.BULLETINMILITARYMIL-BUL-103 - List of Standardized Military Drawings (SMDs).(Copies of
19、the specification, standard, and bulletin required by manufacturers in connection withspecific acquisition functions should be obtained from the contracting activity or as directed by thecontracting activity.)2.2 Order of precedence. In the event of a conflict between the text of this drawing and th
20、ereferences cited herein, the text of this drawing shall take precedence.3. REQUIREMENTS3.1 Item requirements. The individual item requirements shall be in accordance with 1.2.1 ofMIL-STD-883, “Provisions for the use of MIL-STD-883 in conjunction with compliant non-JAN devices“ and asspecified herei
21、n.3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensionsshall be as specified in MIL-M-38510 and herein.3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.2 herein.3.2.2 Terminal connections. The terminal connections shall be as s
22、pecified on figure 1.3.2.3 Truth tables. The truth tables shall be as specified on figure 2.3.2.4 Logic diagrams. The logic diagrams shall be as specified on figure 3.3.3 Electrical performance characteristics. Unless otherwise specified herein, the electricalperformance characteristics are as speci
23、fied in table I and shall apply over the full case operatingtemperature range.3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified intable II. The electrical tests for each subgroup are described in table I.3.5 Marking. Marking shall be in accordance wi
24、th MIL-STD-883 (see 3.1 herein). The part shall bemarked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked aslisted in MIL-BUL-103 (see 6.6 herein).Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARDIZEDMIL
25、ITARY DRAWINGDEFENSE ELECTRONICS SUPPLY CENTERDAYTON, OHIO 45444SIZEA5962-88573REVISION LEVELCSHEET4DESC FORM 193AJUL 91TABLE I. Electrical performance characteristics.G0DG0D G0D G0D G0D G0DTest G0DSymbol G0D Conditions G0D Group A G0DDevice G0D Limits G0D UnitG0DG0D -55G28C T +125G28C G0Dsubgroups
26、G0Dtype G0DG0DG0DCG0DG0D 4.5 V V 5.5 V G0DG0DG0D Min G0D Max G0DCCG0DG0D Unless otherwise specified G0D G0DG0DG0DG0D G0DG0D G0D G0DG0DG0DG0DHigh level output G0DV G0D V = 4.5 V, I = -15.0 mA G0D 1, 2, 3 G0D All G0D 2.4 G0DG0D VOH CC OHvoltage G0DG0D V = V or V G0D G0DG0DG0DG0DIN IH ILG0DG0D G0D G0DG
27、0DG0DG0D G0DG0D G0D G0D G0DG0DG0DG0DLow level output G0DV G0D V = 4.5 V G0D I = 24.0 mA G0D 1, 2, 3 G0D 01, 02 G0DG0D 0.5 G0D VOL CC OLvoltage G0DG0D V = V or V G0DG0DG0DG0DG0DG0DIN IH ILG0DG0D G0D G0D G0DG0DG0DG0DG0DG0D G0D I = 32 mA G0DG0D 03, 04 G0DG0DG0DOLG0DG0D G0D G0D G0DG0DG0DG0D G0DG0D G0D G
28、0DG0DG0DG0DInput clamp voltage G0DV G0D V = 4.5 V, I = -18 mA G0D 1, 2, 3 G0D All G0DG0D -1.2 G0D VIC CC ING0DG0D G0D G0DG0DG0DG0D G0DG0D G0D G0D G0DG0DG0DG0DInput low current G0DI G0D V = 5.5 V G0D V = 0.4 V G0D 1, 2, 3 G0D 01, 02 G0DG0D -5.0 G0D AIL1 CC ING0D G0D Inputs only G0D G0D G0DG0DG0DG0D G
29、0DG0D 1/ G0D G0D G0DG0DG0DG0DG0DIG0DG0D V = 0 V G0DG0D 01, 02 G0DG0D -10.0 G0D AIL2 ING0DG0D G0D G0D G0DG0DG0DG0DG0DG0D G0D G0D G0D 03, 04 G0DG0D -5.0 G0D G0DG0D G0D G0D G0DG0DG0DG0DInput high current G0DI G0D V = 5.5 V G0D V = 2.7 V G0D 1, 2, 3 G0D 01, 02 G0DG0D 5.0 G0D AIH1 CC ING0D G0D Inputs onl
30、y G0D G0D G0DG0DG0DG0D G0DG0D 1/ G0D G0D G0DG0DG0DG0DG0DIG0DG0D V = 5.5 V G0DG0D 01, 02 G0DG0D 10.0 G0D AIH2 ING0DG0D G0D G0D G0DG0DG0DG0DG0DG0D G0D G0D G0D 03, 04 G0DG0D 5.0 G0D G0DG0D G0D G0D G0DG0DG0DG0DOff-state current G0DI G0D V = 5.5 V G0D V = 5.5 V G0D 1, 2, 3 G0D 01, 02 G0DG0D 20.0 G0D AOZH
31、1 CC OUTG0DG0D I/O port G0D G0D G0DG0DG0DG0DG0DG0D 2/ G0D G0DG0D 03, 04 G0DG0D 10.00 G0D G0DG0D G0D G0D G0DG0DG0DG0DG0DIG0DG0D V = 2.7 V G0DG0D 01, 02 G0DG0D 15.0 G0D AOZH2 OUTG0DG0D G0D G0D G0DG0DG0DG0D G0DG0D G0D G0D G0DG0DG0DG0DOff-state current G0DI G0D V = 5.5 V G0D V = 0.4 V G0D 1, 2, 3 G0D 01
32、, 02 G0DG0D -15 G0D AOZL1 CC OUTG0D G0D I/O port G0D G0D G0DG0DG0DG0D G0DG0D 2/ G0D G0D G0DG0DG0DG0DG0DIG0DG0D V = 0 V G0DG0D 01, 02 G0DG0D -20 G0D AOZL2 OUTG0DG0D G0D G0D G0DG0DG0DG0DG0DG0D G0D G0D G0D 03, 04 G0DG0D -10 G0D G0DG0D G0D G0DG0DG0DG0DOutput short circuit G0DI G0D V = 5.5 V, V = 0 V 3/
33、G0D 1, 2, 3 G0D All G0D -60 G0DG0D mAOS CC OUTcurrent G0DG0D G0D G0DG0DG0DG0D G0DG0D G0D G0D G0DG0DG0DG0DStatic supply G0DI G0D V = 5.5 V G0DV = 5.5 or 0 V G0D 1, 2, 3 G0D 01, 02 G0DG0D 160 G0D A CCQ CC INcurrent G0DG0D G0D G0D G0DG0DG0DG0DG0DG0DG0DG0DG0D 03, 04 G0DG0D 1.5 G0D mA G0DG0D G0D G0D G0DG
34、0DG0DG0DG0DIG0DG0DV = 3.4 V 1/ G0DG0D All G0DG0D 3.0 G0DmA/bitCCT ING0DG0D G0D G0D G0DG0DG0DG0D G0DG0D G0D G0D G0DG0DG0DG0DG0DG0D G0DV = 3.4 V 2/ G0D G0DG0DG0D 1.5 G0DmA/bitING0DG0D G0D G0D G0DG0DG0DG0D See footnotes at end of table.Provided by IHSNot for ResaleNo reproduction or networking permitte
35、d without license from IHS-,-,-STANDARDIZEDMILITARY DRAWINGDEFENSE ELECTRONICS SUPPLY CENTERDAYTON, OHIO 45444SIZEA5962-88573REVISION LEVELCSHEET5DESC FORM 193AJUL 91TABLE I. Electrical performance characteristics - Continued.G0DG0D G0D G0D G0D G0DTest G0DSymbol G0D Conditions G0D Group A G0DDevice
36、G0D Limits G0D UnitG0DG0D -55G28C T +125G28C G0Dsubgroups G0D type G0DG0DG0DCG0DG0D 4.5 V V 5.5 V G0DG0DG0D Min G0D Max G0DCCG0DG0D Unless otherwise specified G0D G0DG0DG0DG0D G0DG0D G0D G0DG0DG0DG0DFunctional testing G0DG0D See 4.3.1c G0D 7, 8 G0D All G0DG0DG0DG0DG0D G0D G0DG0DG0DG0D G0DG0D G0D G0D
37、G0DG0DG0DInput capacitance G0DC G0D See 4.3.1.d G0D 4 G0D All G0DG0D 16 G0D pFING0DG0D G0DG0DG0DG0DG0D G0DG0D G0D G0DG0DG0DG0DOutput capacitance G0D C G0DG0D 4 G0DG0DG0D 20 G0D pFOUTG0DG0D G0DG0DG0DG0DG0D G0DG0D G0D G0DG0DG0DG0DI/O capacitance G0D C G0DG0D 4 G0DG0DG0D 20 G0D pFI/OG0DG0D G0D G0DG0DG0
38、DG0D G0DG0D G0D G0DG0DG0DG0DPropagation delay G0Dt G0D See figure 4 R = 500G36 G0D 9,10,11 G0D 01, 02 G0DG0D 18 G0D nsPLH 1Ri to Ti, G0DG0D C = 50 pF R = 500G36 G0D G0DG0DG0DG0DL2Ti to Ri G0DG0D G0DG0D 03, 04 G0DG0D 12 G0D G0DG0D G0D G0DG0DG0DG0DPropagation delay G0Dt G0DG0D 9,10,11 G0D 01, 02 G0DG0
39、D 18 G0D nsPHLRi to Ti, G0DG0D G0D G0DG0DG0DG0DTi to Ri G0DG0D G0DG0D 03, 04 G0DG0D 12 G0D G0DG0D G0D G0DG0DG0DG0DPropagation delay G0Dt G0DG0D 9,10,11 G0D 01, 02 G0DG0D 23 G0D nsPLHRi to parity G0DG0D G0D G0DG0DG0DG0DG0DG0D G0DG0D 03, 04 G0DG0D 14.5 G0D G0DG0D G0D G0DG0DG0DG0DPropagation delay G0Dt
40、 G0DG0D 9,10,11 G0D 01, 02 G0DG0D 23 G0D nsPHLRi to parity G0DG0D G0D G0DG0DG0DG0DG0DG0D G0DG0D 03, 04 G0DG0D 14.5 G0D G0DG0D G0D G0DG0DG0DG0DPropagation delay G0Dt G0DG0D 9,10,11 G0D 01, 02 G0DG0D 18 G0D nsPHLEN to ERR 4/ G0DG0D G0D G0DG0DG0DG0DG0DG0D G0DG0D 03, 04 G0DG0D 14 G0D G0DG0D G0D G0DG0DG0
41、DG0DPropagation delay G0Dt G0DG0D 9,10,11 G0D 01, 02 G0DG0D 23 G0D nsPLHCLR to ERR G0DG0D G0D G0DG0DG0DG0DG0DG0D G0DG0D 03, 04 G0DG0D 21 G0D G0DG0D G0D G0DG0DG0DG0DPropagation delay G0Dt G0DG0D 9,10,11 G0D 01, 02 G0DG0D 33 G0D nsPLHTi, parity to ERR G0DG0D G0D G0DG0DG0DG0D(pass mode only) G0DG0D G0D
42、G0D 03 G0DG0D 21 G0D G0DG0D G0D G0DG0DG0DG0DPropagation delay G0Dt G0DG0D 9,10,11 G0D 01, 02 G0DG0D 28 G0D nsPHLTi, parity to ERR G0DG0D G0D G0DG0DG0DG0D(pass mode only) G0DG0D G0DG0D 03 G0DG0D 21 G0D G0DG0D G0D G0DG0DG0DG0DPropagation delay G0Dt G0DG0D 9,10,11 G0D 01, 02 G0DG0D 25 G0D nsPLHOER to p
43、arity G0DG0D G0D G0DG0DG0DG0DG0DG0D G0DG0D 03, 04 G0DG0D 15 G0D G0DG0D G0D G0DG0DG0DG0DPropagation delay G0Dt G0DG0D 9,10,11 G0D 01, 02 G0DG0D 25 G0D nsPHLOER to parity G0DG0D G0D G0DG0DG0DG0DG0DG0D G0D G0D 03, 04 G0DG0D 15 G0D See footnotes at end of table.Provided by IHSNot for ResaleNo reproducti
44、on or networking permitted without license from IHS-,-,-STANDARDIZEDMILITARY DRAWINGDEFENSE ELECTRONICS SUPPLY CENTERDAYTON, OHIO 45444SIZEA5962-88573REVISION LEVELCSHEET6DESC FORM 193AJUL 91TABLE I. Electrical performance characteristics - Continued.G0DG0D G0D G0D G0D G0DTest G0DSymbol G0D Conditio
45、ns G0D Group A G0DDevice G0D Limits G0D UnitG0DG0D -55G28C T +125G28C G0Dsubgroups G0D type G0DG0DG0DCG0DG0D 4.5 V V 5.5 V G0DG0DG0D Min G0D Max G0DCCG0DG0D Unless otherwise specified G0D G0DG0DG0DG0D G0DG0D G0D G0DG0DG0DG0DOutput enable time G0Dt G0D See figure 4 R = 500G36 G0D 9,10,11 G0D 01, 02 G
46、0DG0D 18 G0D nsPZH 1OER, OET to G0DG0D C = 50 pF R = 500G36 G0D G0DG0DG0DG0DL2Ri, Ti, and parity G0DG0D G0DG0D 03, 04 G0DG0D 12 G0D G0DG0D G0D G0DG0DG0DG0DOutput enable time G0Dt G0DG0D 9,10,11 G0D 01, 02 G0DG0D 18 G0D nsPZLOER, OET to G0DG0D G0D G0DG0DG0DG0DRi, Ti, and parity G0DG0D G0DG0D 03, 04 G
47、0DG0D 12 G0D G0DG0D G0D G0DG0DG0DG0DOutput disable time G0Dt G0DG0D 9,10,11 G0D 01, 02 G0DG0D 18 G0D nsPHZOER, OET to G0DG0D G0D G0DG0DG0DG0DRi, Ti, and parity G0DG0D G0DG0D 03, 04 G0DG0D 12 G0D G0DG0D G0D G0DG0DG0DG0DOutput disable time G0Dt G0DG0D 9,10,11 G0D 01, 02 G0DG0D 18 G0D nsPLZOER, OET to
48、G0DG0D G0D G0DG0DG0DG0DRi, Ti, and parity G0DG0D G0DG0D 03, 04 G0DG0D 12 G0D G0DG0D G0D G0DG0DG0DG0DSet-up time Ti, G0Dt G0DG0D 9,10,11 G0D 01, 02 G0D 21 G0DG0D nsSparity to EN 4/ G0DG0D G0D G0DG0DG0DG0DG0DG0D G0DG0D 03, 04 G0D 10 G0DG0D G0DG0D G0D G0DG0DG0DG0DHold time Ti, G0Dt G0DG0D 9,10,11 G0D01,02,04G0D 2 G0DG0D nsHparity to EN 4/ G0DG0D G0D G0DG0DG0DG0DG0DG0D G0DG0D 03 G0D 3 G0DG0D G0
