1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add footnote 4/ to ICCtests in table I. Update the boilerplate to current requirements as specified in MIL-PRF-38535. jak 10-02-02 Thomas M. Hess REV SHET REV SHET REV STATUS REV A A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12
2、PMIC N/A PREPARED BY Marcia B. Kelleher DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil STANDARD MICROCIRCUIT DRAWING CHECKED BY William J. Johnson THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUIT, DIGITAL, FAST CMOS, 10-BI
3、T NONINVERTING BUS INTERFACE LATCH WITH THREE-STATE OUTPUTS, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 89-09-27 AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-88575 SHEET 1 OF 12 DSCC FORM 2233 APR 97 5962-E065-10 Provided by IHSNot for ResaleNo reprod
4、uction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88575 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant
5、, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-88575 01 K ADrawing number Device type (see 1.2.1) Case outline(see 1.2.2)Lead finish(see 1.2.3)1.2.1 Device type(s).
6、The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54FCT841A 10-bit noninverting bus interface latch with three-state outputs 02 54FCT841B 10-bit noninverting bus interface latch with three-state outputs 1.2.2 Case outline(s). The case outline
7、(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style K GDFP2-F24 or CDFP3-F24 24 Flat pack L GDIP3-T24 or CDIP4-T24 24 Dual-in-line 3 CQCC1-N28 28 Square leadless chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF
8、-38535, appendix A. 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) . -0.5 V dc to +7.0 V dc DC input voltage range (VIN) . -0.5 V dc to VCC + 0.5 V dc DC output voltage range (VOUT) -0.5 V dc to VCC+ 0.5 V dc DC input diode current (IIK) . -20 mA DC output diode current (IOK) -50 mA DC
9、output current (IOUT) 100 mA Maximum power dissipation (PD) 2/ . 500 mW Thermal resistance, junction-to-case (JC) See MIL-STD-1835 Storage temperature range (TSTG) -65C to +150C Junction temperature (TJ) . +175C Lead temperature (soldering, 10 seconds) . +300C 1.4 Recommended operating conditions. S
10、upply voltage range (VCC) . +4.5 V dc to +5.5 V dc Maximum low level input voltage (VIL). 0.8 V dc Minimum high level input voltage (VIH) 2.0 V dc Case operating temperature range (TC) -55C to +125C Minimum setup time, Dn to LE, (ts) Device type 01 2.5 ns Device type 02 2.5 ns Minimum hold time, Dn
11、to LE, (th) Device type 01 3.0 ns Device type 02 2.5 ns Minimum pulse width, LE, (tW) Device type 01 6.0 ns Device type 02 4.0 ns 1/ Unless other wise specified, all voltages are referenced to ground. 2/ Must withstand the added PDdue to short circuit test, e.g., IOS. Provided by IHSNot for ResaleNo
12、 reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88575 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. T
13、he following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufac
14、turing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Mi
15、crocircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this
16、 drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accord
17、ance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38
18、535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications sha
19、ll not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The de
20、sign, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The t
21、ruth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 4. 3.3 Electrical performance characteristics. Unless otherwise
22、 specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each sub
23、group are described in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88575 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 3.5 Marking. Marki
24、ng shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the opti
25、on of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance wi
26、th MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA p
27、rior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with ea
28、ch lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facili
29、ty and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88575 DEFENSE SUPPLY CENTER COLU
30、MBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC+125C VCC= 5.0 V dc 10% unless otherwise specified Device type VCCGroup A subgroups Limits Unit Min Max High level output voltage VOHVIL= 0.8 V
31、 VIH= 2.0 V IOH= -300 A All 4.5 V 1, 2, 3 4.3 V VIL= 0.8 V VIH= 2.0 V IOH= -15 mA All 4.5 V 2.4 Low level output voltage VOLVIL= 0.8 V VIH= 2.0 V IOL= 300 A All 4.5 V 1, 2, 3 0.2 V VIL= 0.8 V VIH= 2.0 V IOL= 32 mA All 4.5 V 0.5 Input clamp voltage VIKIIN= -18 mA All 4.5 V 1 -1.2 V High level input c
32、urrent IIHVIN= 5.5 V All 5.5 V 1, 2, 3 5.0 A Low level input current IILVIN= GND All 5.5 V 1, 2, 3 -5.0 A High impedance output current IOZHVIN= 5.5 V All 5.5 V 1, 2, 3 10.0 A IOZLVIN= GND All 5.5 V 1, 2, 3 -10.0 A Short circuit output current IOS1/ VOUT= GND All 5.5 V 1, 2, 3 -75 mA Quiescent power
33、 supply current (CMOS inputs) ICCQVIN 0.2 V or VIN 5.3 V fi= 0 MHz All 5.5 V 1, 2, 3 1.5 mA Quiescent power supply current (TTL inputs) ICCVIN = 3.4 V 2/ All 5.5 V 1, 2, 3 2.0 mA Dynamic power supply current ICCD4/ OE = GND, LE = VCCVIN 0.2 V or VIN 5.3 V Outputs open One bit toggling 50% duty cycle
34、 All 5.5 V 3/ 0.25 mA/ MHz Total power supply current ICC4/ 5/ OE = GND, LE = VCCVIN 0.2 V or VIN 5.3 V Outputs open One bit toggling 50% duty cycle fCP= 10 MHz All 5.5 V 1, 2, 3 4.0 mA OE = GND, LE = VCCVIN= 3.4 V or VIN= GND Outputs open Ten bits toggling 50% duty cycle fCP= 2.5 MHz All 5.5 V 1, 2
35、, 3 5.0 mA Input capacitance CINSee 4.3.1c All 4 10 pF Output capacitance COUTSee 4.3.1c All 4 12 pF Functional tests See 4.3.1d All 7, 8 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZ
36、E A 5962-88575 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Conditions -55C TC+125C VCC= 5.0 V dc 10% unless otherwise specified Device type VCCGroup A subgroups Limits U
37、nit Min Max Propagation delay time, Dn to On tPLH1, tPHL16/ CL= 50 pF RL= 500 See figure 4 01 4.5 V 9, 10, 11 1.0 8.5 ns 02 1.0 5.6Propagation delay time, LE to On tPLH2, tPHL26/ 01 4.5 V 9, 10, 11 1.0 15.0 ns 02 1.0 9.8Propagation delay time, output enable, OE to On tPZH, tPZL6/ 01 4.5 V 9, 10, 11
38、1.0 13.5 ns 02 1.0 7.5Propagation delay time, output disable, OE to On tPLZ, tPHZ6/ 01 4.5 V 9, 10, 11 1.0 10.0 ns 02 1.0 6.51/ Not more than one output should be shorted at one time and the duration of the short circuit condition should not exceed 1 second. 2/ In accordance with TTL driven input (V
39、IN= 3.4 V); all other inputs at VCCor GND. 3/ This parameter is not directly testable but is derived for use in total power supply calculations. 4/ In an ATE environment, the effect of parasitic output capacitive loading from the test environment must be taken into account, as its effect is not inte
40、nded to be included in the test results. The impact must be characterized and appropriate offset factors must be applied to the test result.“ 5/ ICC= ICCQ+ (ICCx DHx NT) + (ICCDx fI x NI), where: DH= Duty cycle for TTL inputs at DH. NT= Number of TTL inputs high. fI= Input frequency in MHz. NI= Numb
41、er of inputs at fI. 6/ Minimum limits shall be guaranteed, if not tested, to the limits specified in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88575 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHI
42、O 43218-3990 REVISION LEVEL A SHEET 7 DSCC FORM 2234 APR 97 Device types 01 and 02 Case outlines L and K 3 Terminal number Terminal symbol 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 OE D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 GND LE Y9 Y8 Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0 VCC- - - - - - -
43、 - - - - - NC OE D0 D1 D2 D3 D4 NC D5 D6 D7 D8 D9 GND NC LE Y9 Y8 Y7 Y6 Y5 NC Y4 Y3 Y2 Y1 Y0 VCCNC = No internal connection FIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-8857
44、5 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 8 DSCC FORM 2234 APR 97 Device types 01 and 02 Inputs Outputs Function OE LE Dn Yn L H H H Transparent L H L L Transparent L L X NC Latched H X X Z High Z H H L Z High Z H H H Z High Z H L X Z Latched (High Z) H = High
45、 voltage level L = Low voltage level X = Irrelevant Z = High impedance NC = No change FIGURE 2. Truth table. FIGURE 3. Logic diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88575 DEFENSE SUPPLY CENTE
46、R COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 9 DSCC FORM 2234 APR 97 FIGURE 4. Switching waveforms and test circuit. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88575 DEFENSE SUPPLY CENTER
47、COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 10 DSCC FORM 2234 APR 97 Test Switch tPLZ Closed tPZL Closed All other Open NOTES: 1. Load resistance RL= 500 or equivalent. 2. CL= 50 pF or equivalent (includes test jig and probe capacitance). 3. RT= terminal resistance which should be equa
48、l to ZOUTof the pulse generator. 4. VIN= 0 V to 3.0 V: tr= 2.5 ns; tf= 2.5 ns (10% to 90%) unless otherwise specified. FIGURE 4. Switching waveforms and test circuit Continued. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88575 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 11 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampli
