1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add “Changes in accordance with NOR 5962-R202-92“. -tvn 92-05-14 M. L. Poelking B Add “Changes in accordance with NOR 5962-R178-95“. -ltg 95-09-12 M. L. Poelking C Update to reflect latest changes in format and requirements. Editorial changes thr
2、oughout. -les 01-02-15 Raymond Monnin D Update drawing to current requirements. Editorial changes throughout. - gap 08-07-10 Robert M. Heber The original first sheet of this drawing has been replaced. REV SHET REV SHET REV STATUS REV D D D D D D D D D OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 PMIC N/A PREPA
3、RED BY Christopher A. Rauch DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY D. H. Johnson COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUIT, DIGITAL, BIPOLAR, ADVANCED LOW POWER SCHOT
4、TKY TTL, POSITIVE NAND AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 88-04-19 GATE, MONOLITHIC SILICON AMSC N/A REVISION LEVEL D SIZE A CAGE CODE 67268 5962-88589 SHEET 1 OF 9 DSCC FORM 2233 APR 97 5962-E159-08 Provided by IHSNot for ResaleNo reproduction or networking permitted wi
5、thout license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88589 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcirc
6、uits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-88589 01 D X Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the
7、 circuit function as follows: Device type Generic number Circuit function 01 54ALS20 Dual 4-input positive NAND gate 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style D GDFP1-F14 or CDFP2-F14 14
8、Flat package 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. 1/ Supply voltage . -0.5 V dc to +7.0 V dc Input voltage (VIN) . -1.5 V dc at -18mA to +7.0 V dc Storage temperature range . -65C to +150C Maximum power dissipation (PD) . 8.25
9、 mW 2/ Lead temperature (soldering, 10 seconds) +300C Thermal resistance, junction-to-case (JC) See MIL-STD-1835 Junction temperature (TJ) +175C 1.4 Recommended operating conditions. Supply voltage range (VCC) . +4.5 V dc to +5.5 V dc Minimum high-level input voltage (VIH) +2.0 V dc Maximum low leve
10、l input voltage (VIL): TC= +125C . 0.7 V dc TC= -55C . 0.8 V dc TC= +25C . 0.8 V dc Case operating temperature range (TC) -55C to +125C _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affec
11、t reliability. 2/ Maximum power dissipation is defined as VCCx ICC, and must withstand the added PD due to short circuit test; e.g., I0S. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88589 DEFENSE SUPPLY C
12、ENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise s
13、pecified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 -
14、 Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or from the Standard
15、ization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes a
16、pplicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is
17、 produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in a
18、ccordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“
19、 certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The
20、case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switch
21、ing waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 4. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operati
22、ng temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-ST
23、ANDARD MICROCIRCUIT DRAWING SIZE A 5962-88589 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 4 DSCC FORM 2234 APR 97 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, t
24、he manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all
25、non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be r
26、equired from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535,
27、 appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required f
28、or any change that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 4. V
29、ERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The follo
30、wing additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The tes
31、t circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrica
32、l parameter tests prior to burn-in are optional at the discretion of the manufacturer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88589 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION L
33、EVEL D SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ -55C TC+125C Group A subgroups Limits Unit unless otherwise specified Min Max High level output voltage VIL= 0.8 V 1, 3 VOH1VIH= +2.0 V, VCC= +4.5 V, IOH= -0.4 mA 2/ 3/ VIL= 0.7 V 2 2.5 V
34、VIL= 0.8 V 1, 3 Low level output voltage VOLIOL= 4 mA VCC= +4.5 V, VIH= +2.0 V 3/ 4/ VIL= 0.7 V 2 0.4 V Input clamp voltage VICIIN= -18 mA, VCC= +4.5 V 1, 2, 3 -1.5 V High level input current IIH1VCC= +5.5 V, VIN= +2.7 V All other inputs = 0.0 V 1, 2, 3 20 A IIH2VCC= +5.5 V, VIN= +7.0 V All other in
35、puts = 0.0 V 1, 2, 3 0.1 mA Low level input current IILVCC= +5.5 V, VIN= 0.4 V, All other inputs = 4.5 V 1, 2, 3 -0.1 mA Output current IOVCC= +5.5 V, VOUT= 2.25 V 5/ 1, 2, 3 -20 -112 mA High level supply current ICCHVCC= +5.5 V, VIN 0.4 V, All inputs 1, 2, 3 0.4 mA Low level supply current ICCLVCC=
36、 +5.5 V, VIN 4.5 V All inputs 1, 2, 3 1.5 mA Functional tests See 4.3.1c 6/ 7, 8 tPHL9, 10, 11 1 13 ns Propagation delay time, any input to Y tPLHVCC= 4.5 V to 5.5 V, CL= 50 pF, 7/ RL= 500 See figure 4 9, 10, 11 1 12.5 ns 1/ Unused inputs that do not directly control the pin under test must be 2.5 V
37、 or 0.4 V. No unused inputs shall exceed 5.5 V or go less than 0.0 V. No input shall be floated. 2/ One input to gate under test must be = VIL, the other inputs shall be 2.0 V. 3/ All outputs must be tested. In the case where only one input at VILmaximum or VIHminimum produces the proper output stat
38、e, the test must be performed with each input being selected as the VILmaximum or VIHminimum input. 4/ One input to gate under test must be = VIH, the other inputs shall be 2.0 V. 5/ The output conditions have been chosen to produce a current that closely approximates on half of the true short circu
39、it output current, IOS. Not more than one output shall be tested at one time, and the duration of the test condition shall not exceed one second. 6/ Function tests shall be conducted at input test conditions of GND VIL VOLand VOH VIH VCC. 7/ Propagation delay limits are base on single output switchi
40、ng. Unused inputs = 3.5 V or 0.3 V. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88589 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 6 DSCC FORM 2234 APR 97 Case outline D
41、 Terminal number Terminal symbol 1 1A 2 1B 3 NC 4 1C 5 1D6 1Y 7 GND 8 2Y 9 2A 10 2B 11 NC 12 2C13 2D 14 VCCFIGURE 1. Terminal connections. Inputs Output A B C D Y H H H H L L X X X H X L X X H X X L X H X X X L H H = High voltage level L = Low voltage level X Irrelevant FIGURE 2. Truth table. Provid
42、ed by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88589 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 7 DSCC FORM 2234 APR 97 FIGURE 3. Logic diagram. NOTES: 1. CLincludes probe and
43、jig capacitance. 2. All input pulses have the following characteristics: PRR 10 MHz, duty cycle = 50%, tr= 3 ns 1 ns, tf= 3 ns 1 ns. 3. The outputs are measured one at a time with one input transition per measurement. FIGURE 4. Switching waveforms and test circuit. Provided by IHSNot for ResaleNo re
44、production or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88589 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 8 DSCC FORM 2234 APR 97 TABLE II. Electrical test requirements. MIL-STD-883 test requirements Subgroups (in
45、accordance with MIL-STD-883, method 5005, table I) Interim electrical parameters (method 5004) - - - Final electrical test parameters (method 5004) 1*, 2, 3, 7, 8, 9, 10, 11 Group A test requirements (method 5005) 1, 2, 3, 7, 8, 9, 10, 11 Groups C and D end-point electrical parameters (method 5005)
46、1, 2, 3 * PDA applies to subgroup 1. 4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with method 5005 of MIL-STD-883 including groups A, B, C, and D inspections. The following additional criteria shall apply. 4.3.1 Group A inspection. a. Tests shall be as sp
47、ecified in table II herein. b. Subgroups 4, 5, and 6 in table I, method 5005 of MIL-STD-883 shall be omitted. c. Subgroups 7 and 8 shall include verification of the truth table. 4.3.2 Groups C and D inspections. a. End-point electrical parameters shall be as specified in table II herein. b. Steady-s
48、tate life test conditions, method 1005 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of MIL-STD-883. (2) TA= +125C, minimum. (3) Test duration: 1,000 hours, except as permitted by method 1005 of
