1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Update to reflect latest changes in format and requirements. Editorial changes throughout. -les 00-12-21 Raymond Monnin B Add L package. Editorial changes throughout. -les 01-01-29 Raymond Monnin C Update drawing to current requirements. Editoria
2、l changes throughout. - gap 08-06-12 Robert M. Heber The original first sheet of this drawing has been replaced. REV SHET REV SHET REV STATUS REV C C C C C C C C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY Larry T. Gauder DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCU
3、IT DRAWING CHECKED BY Raymond Monnin COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUIT, DIGITAL, BIPOLAR, LOW POWER SCHOTTKY TTL, 16-BIT, PARALLEL-IN, AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROV
4、AL DATE 88-05-18 SERIAL-OUT, SHIFT REGISTER, MONOLITHIC SILICON AMSC N/A REVISION LEVEL C SIZE A CAGE CODE 67268 5962-88607 SHEET 1 OF 11 DSCC FORM 2233 APR 97 5962-E130-08 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING
5、 SIZE A 5962-88607 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 P
6、art or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-88607 01 J X Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number
7、 Circuit function 01 54LS674 16-bit, parallel-in, serial-out shift register, three-state output 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style J GDIP1-T24 or CDIP2-T24 24 Dual-in-line K GDFP2-
8、F24 or CDFP3-F24 24 Flat package L GDIP3-T24 or CDIP4-T24 24 Dual-in-line 3 CQCC1-N28 28 Square leadless chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. 1/ Supply voltage . -0.5 V dc to +7.0 V dc Input voltage: SER/Q15 input
9、 . -1.5 V dc at -18mA to +5.5 V dc All other inputs . -1.5 V dc at -18mA to +7.0 V dc Storage temperature range . -65C to +150C Maximum power dissipation (PD) 2/ . 220 mW 2/ Lead temperature (soldering, 10 seconds) +300C Thermal resistance, junction-to-case (JC) See MIL-STD-1835 Junction temperature
10、 (TJ) +175C _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Maximum power dissipation is defined as VCCx ICC, and must withstand the added PDdue to short circuit test
11、; e.g., I0S. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88607 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 3 DSCC FORM 2234 APR 97 1.4 Recommended operating conditions.
12、 Supply voltage range (VCC) . +4.5 V dc to +5.5 V dc Minimum high-level input voltage (VIH) +2.0 V dc Maximum low level input voltage (VIL) . 0.7 V dc Case operating temperature range (TC) -55C to +125C Minimum width of input clock pulse (tWCLK) . 20 ns Minimum width of input clock pulse (tWCLR) . 2
13、0 ns Minimum setup time (tS): SER/Q15 20 ns MODE 35 ns R/W , CS 35 ns P0-P15 . 20 ns Minimum hold time (th): P0-P15 . 5.0 ns Other inputs . 0 ns 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this d
14、rawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD
15、-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at ht
16、tp:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes pr
17、ecedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88607 DEFENSE SUPPLY CENT
18、ER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing
19、that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approv
20、al in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ o
21、r “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outline
22、s. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Switching waveforms and test circuit. The switching waveforms and test ci
23、rcuit shall be as specified on figure 3. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electri
24、cal test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers
25、PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices b
26、uilt in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a ma
27、nufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and t
28、he requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change tha
29、t affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot fo
30、r ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88607 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions
31、 -55C TC+125C 4.5 V VCC 5.5 V Group A subgroups Limits Unit unless otherwise specified Min Max High level output voltage VOHVCC= +4.5 V, VIL= 0.7 V, VIH= +2.0 V SER/Q15 IOH= -0.1 mA 1, 2, 3 2.4 V Low level output voltage VOLVCC= +4.5 V, VIL= 0.7 V, VIH= +2.0 V SER/Q15 IOL= 4 mA 1, 2, 3 0.4 V Input c
32、lamp voltage VICIIN= -18 mA, VCC= +4.5 V 1, 2, 3 -1.5 V VIN= +5.5 V SER/Q15 1, 2, 3 0.1 mA High level input current IIH1VCC= +5.5 V VIN= +7.0 V All other inputs 1, 2, 3 0.1 mA SER/Q15 1, 2, 3 40 A IIH2VCC= +5.5 V, VIN= +2.7 V All other inputs 1, 2, 3 20 A Off-state output current IOZHVCC= +5.5 V, VI
33、H= +2.0 V, VIL= +0.7 V, VOUT= +2.7 V SER/Q151, 2, 3 40 A IOZLVCC= +5.5 V, VIH= +2.0 V, VIL= +0.7 V, VOUT= +0.4 V 1, 2, 3 -0.4 mA Low level input current IILVCC= +5.5 V, VIN= 0.4 V 1, 2, 3 -0.4 mA Short-circuit output current IOSVCC= +5.5 V 1/ SER/Q151, 2, 3 -30 -130 mA Supply current ICCVCC= +5.5 V
34、1, 2, 3 40 mA Functional tests See 4.3.1c 7, 8 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88607 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SH
35、EET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions -55C TC+125C 4.5 V VCC 5.5 V Group A subgroups Limits Unit unless otherwise specified Min Max 9 20 Maximum clock frequency, CLK to SER/Q15 fMAX10, 11 12 MHz 9 5 33 ns tPLH 10, 11 5 47 9 5
36、40 ns Propagation delay time, CLK to SER/Q15 tPHL 10, 11 5 57 9 5 45 tPZH 10, 11 5 64 ns 9 5 45 Output enable time, CS , R/ W to SER/Q15 tPZL 10, 11 5 64 ns 9 5 44 ns tPHZ 10, 11 5 61 9 5 44 ns Output disable time, CS , R/ W to SER/Q15 tPLZ VCC= 5.0 V, CL= 50 pF, 2/ RL= 667 5% See figure 3 10, 11 5
37、61 1/ Not more than one output shall be shorted at a time, and the duration of the short-circuit condition shall not exceed one second. 2/ Propagation delay time testing may be performed using either CL= 5, 45 or 50 pF. However, the manufacturer must certify and guarantee that the microcircuit meets
38、 the switching test limits specified for a 50 pF load. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88607 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 7 DSCC FORM 2234 AP
39、R 97 Case outlines J, K, and L 3 Terminal number Terminal connection 1 CS NC 2 CLK CS 3 R/ W CLK 4 NC R/ W 5 Mode NC6 SER/Q15 Mode 7 P0 SER/Q15 8 P1 NC 9 P2 P0 10 P3 P1 11 P4 P2 12 GND P3 13 P5 P4 14 P6 GND 15 P7 NC16 P8 P5 17 P9 P6 18 P10 P7 19 P11 P8 20 P12 P9 21 P13 P10 22 P14 NC 23 P15 P11 24 VC
40、CP12 25 P13 26 P14 27 P15 28 VCCNC = No connection FIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88607 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL
41、 C SHEET 8 DSCC FORM 2234 APR 97 Inputs CS R/ W Mode CLK SER/Q15 Operation H X X X Z No change L L X Z Shift and write serial load L H L Q14n Shift and read L H H P15 Parallel load L = Low level (steady state) H = High level (steady state) = transition from high to low level X irrelevant Z = Off-sta
42、te (high impedance) of a 3-state output Q14n = content of 14th bit of the shift register before the most recent transition of the clock. P15 = level of input P15 FIGURE 2. Truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIR
43、CUIT DRAWING SIZE A 5962-88607 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 9 DSCC FORM 2234 APR 97 FIGURE 3. Switching waveforms and test circuit. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCU
44、IT DRAWING SIZE A 5962-88607 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 10 DSCC FORM 2234 APR 97 NOTES: 1. The pulse generator shall have the following characteristics: PRR 1.0 MHz, tTLH 15 ns, tTHL 6 ns. 2. CL= 50 pF 10% including scope probe, wiring, and stray
45、capacitance without the package in the test fixture. 3. RL= 667 5%. 4. All diodes are 1N3064, 1N916 or equivalent. FIGURE 3. Switching waveforms and test circuit - Continued. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWI
46、NG SIZE A 5962-88607 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 11 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in ac
47、cordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, D, E, or F. The test circuit shall be maintained by the manufactu
48、rer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA= +125C, minimum for test condition A, D, or E. TA= +175C, minimum for test condition F. b. Interim and final electrical test parameters shall
