1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Made technical change in table I. Voltage level clarification was made on figure 4. Changed vendor similar part number. Editorial changes throughout. 89-11-22 W. Heckman B Changes IAW NOR 5962-R250-92. Change Table I, output current from -30 mA t
2、o -20 mA minimum. Editorial changes throughout. 92-07-10 Monica L. Poelking C Update to reflect latest changes in format and requirements. Editorial changes throughout. -les 00-12-07 Raymond Monnin D Update drawing to current requirements. Editorial changes throughout. - gap 08-07-08 Robert M. Heber
3、 The original first sheet of this drawing has been replaced. REV SHET REV SHET REV STATUS REV D D D D D D D D D D D OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 PMIC N/A PREPARED BY Larry T. Gauder DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Raymond Monnin COLUMBUS, OHIO 43218
4、-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUIT, DIGITAL, BIPOLAR, ALS SCHOTTKY TTL, DATA SELECTORS/ AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 88-04-18 MULTIPLEXERS WITH 3-STATE OUTPUTS, MONOLITHIC SILIC
5、ON AMSC N/A REVISION LEVEL D SIZE A CAGE CODE 67268 5962-88626 SHEET 1 OF 11 DSCC FORM 2233 APR 97 5962-E133-08 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88626 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, O
6、HIO 43218-3990 REVISION LEVEL D SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown
7、 in the following example: 5962-88626 01 C X Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54ALS258 Quadruple, 2-line to 1-line dat
8、a selectors/ multiplexers with 3-state outputs 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 Dual-in-line F GDFP2-F16 or CDFP3-F16 16 Flat package 2 CQCC1-N20 20 S
9、quare leadless chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. 1/ Supply voltage . -0.5 V dc to +7.0 V dc Input voltage -1.5 V dc at -18mA to +7.0 V dc Storage temperature range -65C to +150C Maximum power dissipation (PD) 2
10、/ 71.5 mW Lead temperature (soldering, 10 seconds) +300C Thermal resistance, junction-to-case (JC) See MIL-STD-1835 Junction temperature (TJ) +175C 1.4 Recommended operating conditions. Supply voltage range (VCC) . +4.5 V dc to +5.5 V dc Minimum high-level input voltage (VIH) +2.0 V dc Maximum low l
11、evel input voltage (VIL): TC= +125C . 0.7 V dc TC= -55C 0.8 V dc TC= +25C . 0.8 V dc Case operating temperature range (TC) -55C to +125C _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affe
12、ct reliability. 2/ Maximum power dissipation is defined as VCCx ICC, and must withstand the added PDdue to short circuit test; e.g., I0. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88626 DEFENSE SUPPLY CE
13、NTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise sp
14、ecified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 -
15、Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or from the Standardi
16、zation Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes ap
17、plicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is
18、produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in ac
19、cordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“
20、certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The c
21、ase outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switchi
22、ng waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 4. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operatin
23、g temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STA
24、NDARD MICROCIRCUIT DRAWING SIZE A 5962-88626 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 4 DSCC FORM 2234 APR 97 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, th
25、e manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all n
26、on-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be re
27、quired from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535,
28、appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required fo
29、r any change that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 4. VE
30、RIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The follow
31、ing additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circui
32、t shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parame
33、ter tests prior to burn-in are optional at the discretion of the manufacturer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88626 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D S
34、HEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ -55C TC+125C 4.5 V VCC 5.5 V Group A subgroups Limits Unit unless otherwise specified Min Max High level output voltage VOHIOH= -0.4 mA 1, 2, 3 2.5 V VCC= +4.5 V, VIH= +2.0 V, VILat +125C = 0.7 V,
35、 VILat +25C = 0.8 V, VILat -55C = 0.8 V 2/ IOH= -1.0 mA 1, 2, 3 2.4 V Low level output voltage VOLVIL= 0.7 V 2 0.4 V VCC= +4.5 V, IOL= 12 mA, VIH= +2.0 V 2/ VIL= 0.8 V 1, 3 0.4 V Input clamp voltage VICIIN= -18 mA, VCC= +4.5 V 1, 2, 3 -1.5 V Low level input current IILVCC= +5.5 V, VIN= 0.4 V, Unused
36、 inputs are 4.5 V 1, 2, 3 -0.1 mA Off-state output current IOZHVCC= +5.5 V, VOUT= +2.7 V 1, 2, 3 20 A IOZLVCC= +5.5 V, VOUT= +0.4 V 1, 2, 3 -20 A High level input current IIH1VCC= +5.5 V, VIN= +2.7 V, Unused inputs are = 0.0 V 1, 2, 3 20 A IIH2VCC= +5.5 V, VIN= +7.0 V, Unused inputs are = 0.0 V 1, 2
37、, 3 0.1 mA Output current IOVCC= +5.5 V, VOUT= 2.25 V 3/ 1, 2, 3 -20 -112 mA Supply current ICCHVCC= 5.5 V, All inputs 4.5 V 1, 2, 3 4 mA ICCL1, 2, 3 11 mA ICCZ1, 2, 3 13 mA Functional testing See 4.3.1c 4/ 7, 8 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networkin
38、g permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88626 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions -55C TC+125C 4.5 V VCC
39、5.5 V Group A subgroups Limits Unit unless otherwise specified Min Max tPLH1 9, 10, 11 2 10 ns Propagation delay time, from A, B to any Y tPHL1 9, 10, 11 2 9 ns tPLH2 9, 10, 11 5 20 ns Propagation delay time, from A /B to any Y tPHL2 9, 10, 11 8 25 ns tPZH 9, 10, 11 5 18 ns Enable time to high level
40、 from G to any Y tPZL 9, 10, 11 5 18 ns tPHZ 9, 10, 11 2 10 ns Disable time from G to any Y tPLZ VCC= 4.5 to 5.5 V, CL= 50 pF, 5/ R1= 500 , R2= 500 , See figure 4 9, 10, 11 3 25 ns 1/ Unused inputs that do not directly control the pin under test must be put at 2.5 V or 0.4 V. No unused inputs shall
41、exceed 5.5 V or go less than 0.0 V. No inputs shall be floated. 2/ All outputs must be tested. In the case where only one input at VILmaximum or VIHminimum produces the proper state, the test must be performed with each input being selected as the VILmaximum or VIHminimum input 3/ The output conditi
42、ons have been chosen to produce a current that closely approximates one half of the true short circuit output current, IOS. Not more than one output will be shorted at a time and the duration of the test condition shall not exceed one second. 4/ Functional tests shall be conducted at input test cond
43、itions of GND VIL VOLand VOH VIH VCC. 5/ Propagation delay limits are based on single output switching. Unused inputs = 3.5 V or 0.3 V. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88626 DEFENSE SUPPLY CEN
44、TER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 7 DSCC FORM 2234 APR 97 Case outlines C and D 2 Terminal number Terminal connection 1 A /B NC 2 1A A /B 3 1B 1A 4 1Y 1B 5 2A 1Y 6 2B NC7 2Y 2A 8 GND 2B 9 3Y 2Y 10 3B GND11 3A NC 12 4Y 3Y13 4B 3B 14 4A 3A 15 G 4Y 16 VCCNC 17 4B 18 4A 19 G
45、20 VCCNC = No connection FIGURE 1. Terminal connections. Input Output Output control SELECT DATA Y G A /B A B H X X X ZL L L X H L L H X L L H X L H L H X H LL = Low voltage level H = High voltage level X = Irrelevant Z = High-impedance state FIGURE 2. Truth table. Provided by IHSNot for ResaleNo re
46、production or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88626 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 8 DSCC FORM 2234 APR 97 FIGURE 3. Logic diagram. Provided by IHSNot for ResaleNo reproduction or networking
47、permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88626 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 9 DSCC FORM 2234 APR 97 NOTES: 1. CLincludes probe and jig capacitance. 2. All input pulses have the following characteristics: PRR 1
48、0 MHz, duty cycle = 50%, tr= tf= 3 ns 1 ns. 3. The outputs are measured one at a time with one input transition per measurement. 4. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. 5. When measuring propagation delay items of 3-state outputs switch S1 is open. FIGURE 4. Switchi
