1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Technical changes in 1.4. Added test condition A to 4.2 and 4.3.2 step 1. Editorial changes throughout. 89-10-23 W. Heckman B Changes in accordance with NOR 5962-R024-94. 93-11-19 Monica L. Poelking C Redrawn with changes. Update drawing to curre
2、nt requirements. Editorial changes throughout. - gap 09-05-07 Joe D. Rodenbeck The original first sheet of this drawing has been replaced. REV SHET REV SHET REV STATUS REV C C C C C C C C C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 PMIC N/A PREPARED BY Monica L. Poelking CHECKED BY Ray M
3、onnin DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil APPROVED BY Michael A. Frye STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 88-09-12 MICROCIRCUIT, DIGITAL, BIPOLAR
4、, ADVANCED SCHOTTKY TTL, 8-BIT BINARY COUNTER, MONOLITHIC SILICON AMSC N/A REVISION LEVEL C SIZE A CAGE CODE 67268 5962-88627 SHEET 1 OF 13 DSCC FORM 2233 APR 97 5962-E058-09 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWI
5、NG SIZE A 5962-88627 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2
6、 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-88627 01 K X Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic numb
7、er Circuit function 01 54F269 8-bit bidirectional binary counter 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style L GDIP3-T24 or CDIP4-T24 24 Dual-in-line K GDFP2-F24 or CDFP3-F24 24 Flat packag
8、e 3 CQCC1-N28 28 Square chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage range . -0.5 V dc minimum to +7.0 V dc maximum Input voltage range -0.5 V dc at -18 mA to +7.0 V dc Storage temperature range . -65C to +
9、150C Maximum power dissipation (PD) 1/ 69 mW Lead temperature (soldering, 10 seconds) . +300C Thermal resistance, junction-to-case (JC) See MIL-STD-1835 Junction temperature (TJ) +175C _ 1/ Must withstand the added PDdue to the short circuit test; e.g., IOS. Provided by IHSNot for ResaleNo reproduct
10、ion or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88627 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 3 DSCC FORM 2234 APR 97 1.4 Recommended operating conditions. Supply voltage range (VCC) 4.5 V dc minimum to 5.5 V
11、dc maximum Case operating temperature range (TC) -55C to +125C Minimum high level input voltage (VIH) 2.0 V dc Maximum low level input voltage (VIL) . 0.8 V dc Minimum high or low setup time (ts): Pn to CP . 2.5 ns PE to CP . 9.5 ns CET , CEP to CP . 10.5 ns D/U to CP 12.5 ns Minimum high or low hol
12、d time (th): Pn to CP . 1.0 ns PE to CP . 0 ns CET , CEP to CP . 2.0 ns D/U to CP 0 ns Minimum high or low clock pulse width (tw) 4.0 ns 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing t
13、o the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - T
14、est Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assi
15、st.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence
16、. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88627 DEFENSE SUPPLY CENTER COLUM
17、BUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is
18、produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in ac
19、cordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“
20、certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The c
21、ase outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Timing diagram. The timing diagram shall be as specified on figure 3. 3.2.5 Test
22、circuit and switching waveforms. The test circuit and switching waveforms shall be as specified on figure 4. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operat
23、ing temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marke
24、d with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark.
25、 A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of
26、 compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacture
27、rs product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. No
28、tification of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made av
29、ailable onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88627 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 5 DSCC FORM 2234 APR 97 TAB
30、LE I. Electrical performance characteristics. Limits Test Symbol Conditions -55C TC +125C unless otherwise specified Group A subgroups Min Max Unit VOHVCC= 4.5 V, VIL= 0.8 V, 1, 2, 3 2.5 V High level output voltage VIH= 2.0 V, IOH= -1.0 mA VOLVCC= 4.5 V, VIL= 0.8 V, 1, 2, 3 0.5 V Low level output vo
31、ltage VIH= 2.0 V, IOL= 20 mA Input clamp voltage VICVCC= 4.5 V, IIN= -18 mA 1, 2, 3 -1.2 V IIH1VCC= 5.5 V, VIN= 7.0 V 1, 2, 3 100 A High level input current IIH2 VCC= 5.5 V, VIN= 2.7 V 1, 2, 3 20 A IILVCC= 5.5 V, VIN= 0.5 V 1, 2, 3 -0.6 mA Low level input current IOSVCC= 5.5 V, VOUT= 0.0 V 1/ 1, 2,
32、3 -60 -150 mA Short circuit output current Supply current ICCHVCC= 5.5 V, 1, 2, 3 120 mA PE = CET = CEP = D/U = GND, Pn = 4.5 V, CP = _/, outputs open ICCLVCC= 5.5 V, 1, 2, 3 125 mA PE = CET = CEP = D/U = GND, CP = _/, outputs open Maximum clock frequency fMAX9 100 MHz 10, 11 85 2/ VCC= 5.0 V, CL= 5
33、0 pF, RL= 500 , See figures 3 and 4 Propagation delay time, tPLH19 3.5 9 ns CP to Qn (load) 10, 11 3.5 10 tPHL19 4 8.5 ns VCC= 5.0 V, PE = 0.8 V, CL= 50 pF, RL= 500 , See figures 3 and 4 10, 11 4 9 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted wi
34、thout license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88627 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Limits Test Symbol Conditions -55C TC +125C unless otherwise
35、 specified Group A subgroups Min Max Unit 9 3.5 8.0 ns 10, 11 3.5 9.0 tPLH29 4.5 10.5 ns Propagation delay time, CP to Qn (count) tPHL2VCC= 5.0 V, PE = 2.0 V, CL= 50 pF, RL= 500 , See figures 3 and 4 10, 11 4.5 11.0 9 4.5 9.5 ns tPLH310, 11 4.5 10.5 9 6.0 10.0 ns Propagation delay time, CP to TC tPH
36、L3VCC= 5.0 V, CL= 50 pF, RL= 500 , See figures 3 and 4 10, 11 5.5 10.5 9 3.5 9.0 ns tPLH410, 11 3.5 10.5 9 3.0 10.5 ns Propagation delay time, CET to TC tPHL410, 11 3.0 11.5 9 3.5 9.5 ns tPLH510, 11 3.5 10.0 9 4.5 9.5 ns Propagation delay time, D/U to TC tPHL510, 11 4.5 11.0 1/ Not more than one out
37、put should be shorted at a time, and the duration of the short circuit condition should not exceed 1 second. 2/ This parameter is guaranteed, but not tested. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88
38、627 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 7 DSCC FORM 2234 APR 97 Case outlines K and L 3 Terminal number Terminal symbol 1 D/U NC 2 Q0D/U 3 Q1Q04 Q2Q15 Q3Q26 Q4Q37 GND Q48 Q5NC 9 Q6GND 10 Q7Q511 CP Q612 CEP Q713 CET CP Pin Pin description 14 TC CEP PO- P7Pa
39、rallel data inputs 15 P7NC PE Parallel enable input (active LOW) 16 P6CET D/U Up-down count control input 17 P5TC CEP Count enable parallel input (active LOW) 18 P4P7CET Count enable trickle input (active LOW) 19 VCCP6CP Clock input 20 P3P5TC Terminal count output (active LOW) 21 P2P4Q0- Q7Flip-flop
40、 outputs 22 P1NC 23 P0VCC24 PE P325 P226 P127 P028 PE NC = No connection FIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88627 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 432
41、18-3990 REVISION LEVEL C SHEET 8 DSCC FORM 2234 APR 97 Inputs Outputs Operating mode CP D/U CEP CET PE Pn QnTC X X X l l L (a) Parallel load X X X l h H (a) Count up h l l h X Count up (a) Count down l l l h X Count down (a) X h X h X qn (a) Hold do nothing X X h h X qn H H = High voltage level stea
42、dy state. h = High voltage level one setup time prior to the low-to-high clock transition. L = Low voltage level steady state. l = Low voltage level one setup time prior to the low-to-high clock transition. X = Irrelevant q = Lower case letters indicate the state of the referenced output prior to th
43、e low-to-high clock transition. = Low-to-high clock transition. (a) = The TC is low when CET is low and the counter is at terminal count. Terminal count up is with all Qnoutputs high and terminal count down is with all Qnoutputs low. FIGURE 2. Truth table. Provided by IHSNot for ResaleNo reproductio
44、n or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88627 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 9 DSCC FORM 2234 APR 97 FIGURE 3. Timing diagram. Provided by IHSNot for ResaleNo reproduction or networking permitte
45、d without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88627 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 10 DSCC FORM 2234 APR 97 FIGURE 4. Test circuit and switching waveforms. Provided by IHSNot for ResaleNo reproduction or networking permitted
46、 without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88627 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 11 DSCC FORM 2234 APR 97 NOTES: 1. CLincludes probe and jig capacitance. 2. RT= ZOUTof pulse generators. 3. Input pulse characteristics: PRR =
47、 1 MHz, tTLH= tTHL= 2.5 ns, duty cycle = 50%. 4. The shaded areas indicate when the input is permitted to change for predictable output performance. FIGURE 4. Test circuit and switching waveforms - Continued. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from I
48、HS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88627 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 12 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004
