DLA SMD-5962-88636 REV D-2013 MICROCIRCUIT MEMORY DIGITAL CMOS 1K X 8 REGISTERED PROM MONOLITHIC SILICON.pdf

上传人:medalangle361 文档编号:699292 上传时间:2019-01-01 格式:PDF 页数:13 大小:154.34KB
下载 相关 举报
DLA SMD-5962-88636 REV D-2013 MICROCIRCUIT MEMORY DIGITAL CMOS 1K X 8 REGISTERED PROM MONOLITHIC SILICON.pdf_第1页
第1页 / 共13页
DLA SMD-5962-88636 REV D-2013 MICROCIRCUIT MEMORY DIGITAL CMOS 1K X 8 REGISTERED PROM MONOLITHIC SILICON.pdf_第2页
第2页 / 共13页
DLA SMD-5962-88636 REV D-2013 MICROCIRCUIT MEMORY DIGITAL CMOS 1K X 8 REGISTERED PROM MONOLITHIC SILICON.pdf_第3页
第3页 / 共13页
DLA SMD-5962-88636 REV D-2013 MICROCIRCUIT MEMORY DIGITAL CMOS 1K X 8 REGISTERED PROM MONOLITHIC SILICON.pdf_第4页
第4页 / 共13页
DLA SMD-5962-88636 REV D-2013 MICROCIRCUIT MEMORY DIGITAL CMOS 1K X 8 REGISTERED PROM MONOLITHIC SILICON.pdf_第5页
第5页 / 共13页
点击查看更多>>
资源描述

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R231-93. 93-09-21 M. A. Frye B Updated boilerplate. Added device types 03-05. Removed programming requirements from drawing. TABLE I. changes. Editorial changes throughout. 94-08-19 M. A. Frye C Boilerplate upd

2、ate, part of 5 year review. ksr 07-01-30 Joseph Rodenbeck D Updated drawing to meet current MIL-PRF-38535 requirements. glg. 13-06-21 Charles F. Saffle REV SHEET REV SHEET REV STATUS REV D D D D D D D D D D D OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 PMIC N/A PREPARED BY James E. Jamison DEFENSE SUPPL

3、Y CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Ray Monnin COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 1K X 8 REGISTERED PROM, MONOLITHIC SILICON AND AGENC

4、IES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 88-09-22 AMSC N/A REVISION LEVEL D SIZE A CAGE CODE 67268 5962-88636 SHEET 1 OF 11 DSCC FORM 2233 APR 97 5962-E441-13 .Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWIN

5、G SIZE A 5962-88636 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or I

6、dentifying Number (PIN). The complete PIN is as shown in the following example: 5962-88636 01 K A Drawing number Device type (see 1.2.1) Case outline (see 1.2.2) Lead finish (see 1.2.3) 1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number 1/ C

7、ircuit function Access time 01 7C235 1K X 8-bit registered PROM 40 02 7C235 1K X 8-bit registered PROM 30 03 7C235A 1K X 8-bit registered PROM 40 04 7C235A 1K X 8-bit registered PROM 30 05 7C235A 1K X 8-bit registered PROM 25 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-18

8、35 and as follows: Outline letter Descriptive designator Terminals Package style K CDFP3-F24 or GDFP2-F24 24 flat package L CDIP4-T24 or GDIP3-T24 24 Dual-in-line 3 CQCC1-N28 28 Square chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum

9、ratings. Supply voltage range to ground potential (VCC) - -0.5 V dc to +7.0 V dc DC voltage range applied to the outputs in the high Z state - -0.5 V dc to +7.0 V dc DC input voltage - - - - - - - - - - - - - - - - - - - - - - - -3.0 V dc to +7.0 V dc Maximum power dissipation - 1.0 W 3/ Lead temper

10、ature (soldering, 10 seconds) - +260C Thermal resistance, junction-to-case (JC) - - - - - - - - - - See MIL-STD-1835 Junction temperature (TJ) - - - - - - - - - - - - - - - - - - - +150C 4/ Storage temperature range (TSTG) - - - - - - - - - - - - - - - - -65C to +150C Temperature under bias - -55C t

11、o +125C Data retention - 10 years, minimum 1.4 Recommended operating conditions. Supply voltage range (VCC) - +4.5 V dc minimum to +5.5 V dc maximum Ground voltage (GND) - 0 V dc Input high voltage range (VIH) - +2.0 V dc to VCCInput low voltage range (VIL) - -0.5 V dc to +0.8 V dc Case operating te

12、mperature range (TC) - -55C to +125C 1/ Generic numbers are also listed on the Standard Microcircuit Drawing Source Approval Bulletin and in MIL-HDBK-103. 2/ Unless otherwise specified, all voltages are referenced to ground. 3/ Must withstand the added PDdue to short circuit test; e.g., IOS. 4/ Maxi

13、mum junction temperature may be increased to +175C during burn-in and steady state life tests. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88636 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LE

14、VEL D SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those ci

15、ted in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlin

16、es. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/quicksearch.dla.mil/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Ph

17、iladelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has b

18、een obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified an

19、d qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the

20、 Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required

21、 to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Terminal connections. The terminal connections shall be as specified on figure 1. 3

22、.2.2 Truth table. The truth table shall be as specified on figure 2. 3.2.2.1 Unprogrammed devices. The truth table for unprogrammed devices for contracts involving no altered item drawing shall be as specified on figure 2. When required in groups A, B, C, or D (see 4.3), the devices shall be program

23、med by the manufacturer prior to test with a minimum of 50 percent of the total number of gates programmed or to any altered item drawing pattern which includes at least 25 percent of the total number of gates programmed. 3.2.2.2 Programmed devices. The truth tables for programmed devices shall be a

24、s specified by an attached altered item drawing. 3.2.3 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over

25、 the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted without l

26、icense from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88636 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 4 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC+125C 4.5 V VCC 5.5 V unless otherwise specified Group A s

27、ubgroups Device type Limits Unit Min Max Output high voltage VOHVCC=Min, IOH= -4.0 mA, 1, 2, 3 All 2.4 V VIN= VIHor VILOutput low voltage VOLVCC= Min, IOL= 16.0 mA, 1, 2, 3 All 0.4 V VIN= VIHor VILInput high voltage VIH1/ 1, 2, 3 All 2.0 V Input low voltage VIL1/ 1, 2, 3 All 0.8 V Input leakage curr

28、ent IIXVCC=Max VIN= 5.5 V and GND 1, 2, 3 All -10 10 A Output leakage current IOZVCC= Max 1, 2, 3 All -10 10 A VOUT= 5.5 V and GND 2/ Outputs disabled Output short circuit IOSVCC= Max 3/, 4/ 1, 2, 3 All -20 -90 mA current VOUT= GND Power supply current ICCVCC= Max 1, 2, 3 All 120 mA IOUT= 0 mA Input

29、 capacitance CINVCC= 5.0 V 4 All 10 pF TC= +25C f = 1 MHz VIN= 0 V Output capacitance COUT(see 4.3.1c) VOUT= 0 V 4 All 10 pF Functional tests See 4.3.1e 7, 8A, 8B All Address setup to clock tSA9, 10, 11 01, 03 40 ns high 02, 04 30 5/ 05 25 Address hold from clock tHA9, 10, 11 All 0 ns high Clock hig

30、h to output tCO9, 10, 11 01, 03 20 ns valid 02, 04 15 05 12 Clock pulse width tPWC9, 10, 11 01, 03 20 ns 02, 04 15 05 12 Es setup to clock high tSEs9, 10, 11 01, 03 15 ns 02, 04 05 10 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license

31、from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88636 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions -55C TC+125C 4.5 V VCC 5.5 V Group A subgroups Device type L

32、imits Unit unless otherwise specified Min Max Es hold from clock high tHEs5/ 9, 10, 11 All 5 ns Inactive to valid output tCOS9, 10, 11 01, 03 25 ns from clock high 6/ 02, 04, 05 20 Inactive output from tHZC9, 10, 11 01, 03 25 ns clock high 3/, 6/, 7/ 02, 04, 05 20 Valid output from E low tDOE9, 10,

33、11 01, 03 25 ns 8/ 02, 04, 05 20 Inactive output from E tHZE9, 10, 11 01, 03 25 ns high 3/, 7/, 8/ 02, 04, 05 20 Delay from INIT to tDI9, 10, 11 01, 03 35 valid output 3/ 02, 04, 05 25 ns INIT recovery to clock high 3/ tRI9, 10, 11 All 20 ns INIT pulse width tPWI9, 10, 11 01, 03 25 3/ 02, 04, 05 20

34、ns 1/ These are absolute values with respect to device ground pin and include all overshoots due to system or tester noise. Do not attempt to test these values without suitable equipment. 2/ For devices using synchronous enable, the device must be clocked after applying these voltages to perform thi

35、s measurement. 3/ These parameters may not be tested, but shall be guaranteed to the limits specified in table I. 4/ For test purposes, not more than one output at a time should be shorted. Short circuit test duration should not exceed 30 seconds. 5/ AC tests are performed with input rise and fall t

36、imes of 5 ns or less, timing reference levels of 1.5 V, input pulse levels of 0 V to 3.0 V, output loading of the specified IOLor IOHand 50 pF load capacitance. See figure 3. 6/ Applies only when the synchronous Es function is used. 7/ Transition is measured at steady state high level -500 mV or ste

37、ady state low level +500 mV on the output from the 1.5 V level on the input and 5 pF load capacitance. See figure 3. 8/ Applies only when the asynchronous E function is used. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWI

38、NG SIZE A 5962-88636 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 6 DSCC FORM 2234 APR 97 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be m

39、arked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in complianc

40、e to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in ord

41、er to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and t

42、he requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DLA Land and Maritime-VA shall be required f

43、or any change that affects this drawing. 3.9 Verification and review. DLA Land and Maritime, DLA Land and Maritimes agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore a

44、t the option of the reviewer. 3.10 Processing options. Since the device is capable of being programmed by either the manufacturer or the user to result in a wide variety of configurations; two processing options are provided for selection in the contract, using an altered item drawing. 3.10.1 Unprog

45、rammed device delivered to the user. All testing shall be verified through group A testing as defined in 3.2.2.1 and table II. It is recommended that users perform subgroups 7 and 9 after programming to verify the specific program configuration. 3.10.2 Manufacturer-programmed device delivered to the

46、 user. All testing requirements and quality assurance provisions herein, including the requirements of the altered item drawing, shall be satisfied by the manufacturer prior to delivery. 3.11 Data retention. A data retention stress test shall be completed as part of the vendors reliability monitors. This test shall be done initially and after any design or process change which may affect data retention. The methods and procedures may be vendor specific, but will guarantee the number of years listed in section 1.3 herein over the full

展开阅读全文
相关资源
猜你喜欢
相关搜索

当前位置:首页 > 标准规范 > 国际标准 > 其他

copyright@ 2008-2019 麦多课文库(www.mydoc123.com)网站版权所有
备案/许可证编号:苏ICP备17064731号-1