1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Update boilerplate to MIL-PRF-38535 requirements. Correct error in Status Outputs function table. Add “QD” device criteria. Add vendor CAGE 3V146. Correct drawing title. - CFS 03-03-05 Thomas M. Hess B Correct the SIO0and QIO0signal designations
2、in Figure 4. Update boilerplate to current MIL-PRF-38535 requirements. - CFS 04-09-08 Thomas M. Hess C Update boilerplate to current MIL-PRF-38535 requirements. - CFS 09-05-05 Thomas M. Hess REV SHET REV C C C C C C C C C C C C C SHEET 15 16 17 18 19 20 21 22 23 24 25 26 27 REV STATUS REV C C C C C
3、C C C C C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Greg A. Pitz DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Ray Monnin COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY D.
4、 A. DiCenzo MICROCIRCUIT, DIGITAL, 4-BIT BIPOLAR MICROPROCESSOR SLICE, MONOLITHIC AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 88-08-26 SILICON AMSC N/A REVISION LEVEL C SIZE A CAGE CODE 67268 5962-88677 SHEET 1 OF 27 DSCC FORM 2233 APR 97 5962-E290-09 Provided by IHSNot for Resal
5、eNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88677 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883
6、 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-88677 01 X X Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Devi
7、ce type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 2903A 4-bit bipolar microprocessor slice 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminal
8、s Package style X GDIP1-T48 or CDIP2-T48 48 Dual-in-line Y See figure 1 48 Flat pack Z See figure 1 52 Square leadless chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage range -0.5 V dc to +7.0 V dc Input voltage
9、 range -0.5 V dc to +5.5 V dc DC voltage applied to outputs for high output state. -0.5 V dc to +VCCmaximum DC output current into inputs 30 mA DC input current. -30 mA to +5.0 mA Storage temperature range -65C to +150C Maximum power dissipation (PD) 1/. 2.173 W Lead temperature (soldering, 10 secon
10、ds). +300C Thermal resistance, junction-to-case (JC): Case X See MIL-STD-1835 Case Y 10C/W Case Z 3C/W Junction temperature (TJ). +175C 1.4 Recommended operating conditions. Supply voltage (VCC) +4.5 V dc to +5.5 V dc Minimum high-level input voltage (VIH). +2.0 V dc Maximum low-level input voltage
11、(VIL) +0.8 V dc Case operating temperature range (TC) . -55C to +125C _ 1/ Must withstand the added PDdue to short circuit test (e.g., IOS). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88677 DEFENSE SUPPL
12、Y CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwis
13、e specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-183
14、5 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or from the Stand
15、ardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersede
16、s applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that
17、 is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval i
18、n accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “Q
19、ML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. This drawing has been modified to allow the manufacturer to use the alternate die/fabrication requirements of paragraph A.3.2.2 of MIL-PRF-38535 or other alternative approved by the qual
20、ifying activity. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein and figure 1. 3.2.2 Terminal connection
21、s. The terminal connections shall be as specified on figure 2. 3.2.3 Function tables. The function tables shall be as specified on figure 3. 3.2.4 Functional block diagram. The functional block diagram shall be as specified on figure 4. 3.2.5 Load circuits. The load circuits shall be as specified on
22、 figure 5. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88677 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 4 DSCC FORM 2234 APR 97 3.3 Electrical performance characterist
23、ics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electric
24、al tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number
25、is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” sh
26、all be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. For product built in accordance with A.3.2.2 of MIL-PRF-38535, or as modified in the manufacturers QM plan, the “QD” certification mark shall be used in place of the
27、“Q“ or “QML“ certification mark. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 and QML38535 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing a
28、s an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microci
29、rcuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable
30、 required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88677 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OH
31、IO 43218-3990 REVISION LEVEL C SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC+125C +4.5 V VCC +5.5 V unless otherwise specified Group A subgroups Device type Limits Unit Min Max IOH= -1.6 mA Y0-3, G/N 2.4 Output high voltage VOHVCC= 4.5
32、V, VIN= VIHor VILIOH= -0.8 mA DB0-3, P/OVR, SIO0, SIO3, QIO0, QIO3, WRITE, Cn+4 2.4 V Output leakage current for Z output 1/ ICEXVCC= 4.5 V, VOH= 5.5 V VIN= VIHor VIL250 A IOL= 16 mA Y0-3, Z 0.5 IOL= 8 mA DB0-30.5 IOL= 18 mA G/N 0.5 IOL= 10 mA P/OVR 0.5 Output low voltage VOLVCC= 4.5 V, VIN= VIHor V
33、ILIOL= 8 mA Cn+4, SIO0, SIO3, QIO0, QIO3, WRITE 0.5 V Input high voltage VIHGuaranteed input logical high voltage for all inputs. 2/ 2.0 V Input low voltage VILGuaranteed input logical low voltage for all inputs. 2/ 0.8 V Input clamp voltage VICVCC= 4.5 V, IIN= -18 mA -1.5 V Cn -3.6 Y0-3-1.13 I0-4,
34、DA0-3-0.72 SIO0, SIO3, QIO0, QIO3, DB0-3, MSS -0.77 Input low current IILVCC= 5.5 V, VIN= 0.5 V 1/ All other inputs -0.36 mA Cn 200 Y0-3110 I0-4, DA0-340 SIO0, SIO3, QIO0, QIO3, DB0-3, MSS 90 Input high current IIHVCC= 5.5 V, VIN= 2.7 V 1/ All other inputs 20 A Input high current IIVCC= 5.5 V, VIN=
35、5.5 V 1, 2, 3 01 1.0 mA See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88677 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 6 DSCC FORM 2234 AP
36、R 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions -55C TC+125C +4.5 V VCC +5.5 V unless otherwise specified Group A subgroups Device type Limits Unit Min Max VO= 2.4 V 110 Y0-3VO= 0.5 V -1130 VO= 2.4 V 90 Off-state (high impedance) output current IOZH, IOZLVCC=
37、 5.5 V 1/ DB0-3, QIO0, QIO3, SIO0, WRITE/MSSVO= 0.5 V -770 A Output short circuit current 3/ IOSVCC= 5.5 V + 0.5 V VO= 0.5 V 1, 2, 3 -30 -85 mA TC= -55C to +125C 1, 2, 3 395 Power supply current 4/ ICCVCC= 5.5 V TC= +125C 2 258 mA Enable time 1 tEN125 ns Disable time 1 5/ tDIS1See figure 5 From: OEY
38、To: Y 21 ns Enable time 2 tEN225 ns Disable time 2 5/ tDIS2See figure 5 From: OEBTo: DB 21 ns Enable time 3 tEN325 ns Disable time 3 5/ tDIS3See figure 5 From: I8To: SIO 21 ns Enable time 4 tEN438 ns Disable time 4 5/ tDIS4See figure 5 From: I8To: QIO 38 ns Enable time 5 tEN538 ns Disable time 5 5/
39、tDIS5See figure 5 From: I8, I7, I6, I5To: QIO 38 ns Enable time 6 tEN638 ns Disable time 6 5/ tDIS6See figure 5 From: I4, I3, I2, I1, I0To: QIO 38 ns Enable time 7 tEN730 ns Disable time 7 5/ tDIS7See figure 5 From: LSS To: WRITE 25 ns Minimum clock low time tCLSee figure 5 30 ns Minimum clock high
40、time tCHSee figure 5 30 ns Minimum time CP and WE both low to WRITE tCP/WESee figure 5 9, 10, 11 01 30 ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88677 DEFENSE SUPPLY CE
41、NTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions -55C TC+125C +4.5 V VCC +5.5 V unless otherwise specified Group A subgroups Device type Limits Unit Min Max Setup and hold times,
42、 all functions tS, tHSee table IIIA and figure 5 6/ ns Propagation delays, standard functions and increment by one or two instructions tPDSee table IIIB and figure 5 6 ns Propagation delays, multiply instructions tPDSee table IIIC and figure 5 6/ ns Propagation delays, divide instructions tPDSee tab
43、le IIID and figure 5 6 ns Propagation delays, sign magnitude to twos complement conversion tPDSee table IIIE and figure 5 6/ ns Propagation delays, single length normalization tPDSee table IIIF and figure 5 6/ 9, 10, 11 01 ns 1/ Y0-3, DB0-3, SIO0-3, QIO0-3, and WRITE/MSS are three state outputs inte
44、rnally connected to a TTL input. Input characteristics are measured under conditions such that the outputs are in the OFF state. 2/ These input levels provide zero noise immunity and should only be static tested in a noise-free environment (not functionally tested). 3/ Not more than one output shoul
45、d be shorted at a time. Duration of the short circuit test should not exceed one second. 4/ Worst case ICCis at minimum temperature. 5/ CL= 50 pF for output disable tests. Measurement is made to a 0.5 V change of output. 6/ Inputs switch between 0 V and 3 V at 1 V/ns and measurements made at 1.5 V.
46、Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88677 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 8 DSCC FORM 2234 APR 97 Case outline Y Case outline Y Inches Millimeters S
47、ymbol Minimum Maximum Minimum Maximum A .070 .098 1.78 2.49 b .017 .022 0.43 0.56 c .008 .012 0.20 0.30 D 1.185 1.235 30.10 31.37 E .620 .660 15.75 16.76 E1 - .720 - 18.29 E2 .520 - 13.21 - E3 .030 - 0.76 - e .045 .055 1.14 1.40 L .320 .370 8.13 9.40 L1 1.300 1.360 33.02 34.54 Q .030 .060 0.76 1.52
48、S - .045 - 1.14 S1 .005 - 0.13 - NOTES: 1. Index area: A notch, tab, or pin one identification mark shall be located within the shaded area shown. 2. E1 allows for Ag-Cu alloy brazed overrun. 3. Dim. b and c increase by 3 mils max. limit if tinplate/solder dip lead finish is applied. 4. All dimensions are given in inches. 5. Dimension S1 is measured from the furthest edge of the ceramic body to the metal pad or lead, whichever is closer. 6. Dimension Q shall be measured at the point of exit of the lead from the body. FIGURE 1. Case outlin
