1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Update boilerplate to MIL-PRF-38535 requirements. Editorial changes throughout. - jak 03-06-11 Thomas M. Hess B Update test condition for high level output voltage (VOH) and low level output voltage (VOL) in table I. Update boilerplate paragraphs
2、 to MIL-PRF-38535 requirement. - jak 10-02-12 Thomas M. Hess REV SHEET REV SHEET REV STATUS REV B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY James E. Nicklaus DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil STANDARD MICROCIRC
3、UIT DRAWING CHECKED BY D. A. DiCenzo THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE APPROVED BY Michael A. Frye MICROCIRCUIT, DIGITAL, ADVANCED CMOS, OCTAL D-TYPE FLIP-FLOP WITH CLOCK ENABLE, MONOLITHIC SILICON DRAWING APPROVAL DATE 88-09-06 AMSC N/A R
4、EVISION LEVEL B SIZE A CAGE CODE 67268 5962-88702 SHEET 1 OF 12 DSCC FORM 2233 APR 97 5962-E118-10 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 SIZE A 5962-8870
5、2 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the follo
6、wing example: 5962-88702 01 R A Drawing number Device type Case outline Lead finish (see 1.2.1) (see 1.2.2) (see 1.2.3) 1.2.1 Device types. The device types identify the circuit function as follows: Device type Generic number Circuit function 01 54AC377 Octal D-type flip-flop with clock enable 1.2.2
7、 Case outlines. The case outlines are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style R GDIP1-T20 or CDIP2-T20 20 Dual-in-line S GDFP2-F20 or CDFP3-F20 20 Flat pack 2 CQCC1-N20 20 Leadless-chip-carrier 1.2.3 Lead finish. The lead finish is
8、as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. 1/ 2/ Supply voltage range (VCC) -0.5 V dc to +6.0 V dc maximum DC input voltage range (VIN) -0.5 V dc to VCC+ 0.5 V dc DC output voltage range (VOUT) . -0.5 V dc to VCC+ 0.5 V dc Clamp diode current (IIK, IOK) . 20 mA DC outpu
9、t current (per pin) (IOUT) . 50 mA DC VCCor GND current (ICC, IGND) . 100 mA Storage temperature range (TSTG) . -65C to +150C Maximum power dissipation (PD) 500 mW Lead temperature (soldering, 10 seconds) +245C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) +1
10、75C 3/ 1.4 Recommended operating conditions. 2/ Supply voltage range (VCC) +3.0 V dc to 5.5 V dc 4/ Input voltage range (VIN) 0.0 V dc to VCCOutput voltage range (VOUT) 0.0 V dc to VCCCase operating temperature range (TC) . -55C to +125C Input rise and fall rate (t/V): VCC= 3.6 V or VCC= 5.5 V . 0 t
11、o 8 ns/V 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Unless otherwise specified, all voltages are referenced to ground. 3/ Maximum junction temperature shall not be
12、 exceeded except for allowable short duration burn-in screening conditions in accordance with method 5004 of MIL-STD-883. 4/ Operation from 2.0 V dc to 3.0 V dc is provided for compatibility with data retention and battery back-up systems. Data retention implies no input transition and no stored dat
13、a loss with the following conditions: VIH 70% VCC, VIL 30% VCC, VOH 70% VCC -20A, VOL 30% VCC 20 A. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 SIZE A 5962-887
14、02 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 2 APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents
15、 are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Componen
16、t Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbi
17、ns Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless
18、a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer
19、Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML
20、 flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with
21、 MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance w
22、ith 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuit. The sw
23、itching waveforms and test circuit shall be as specified on figure 4. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 SIZE A 5962-88702 REVISION LEVEL B SHEET 4 DS
24、CC FORM 2234 APR 97 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements
25、 shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marke
26、d as listed in MIL-HDBK-103 (see 6.6 herein). For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on
27、 all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall
28、 be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 and QML-38535 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirement
29、s of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA
30、shall be required in accordance with MIL-PRF-38535, appendix A. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the optio
31、n of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 SIZE A 5962-88702 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance
32、 characteristics. Test and MIL-STD-883 test method 1/ Symbol Test conditions -55C TC +125C 3.0 V VCC 5.5 V unless otherwise specified Group A subgroups Limits 2/ Unit Min Max High-level output voltage 3006 VOH3/ VIN= VIHor VILIOH= -50 A VCC= 3.0 V 1, 2, 3 2.9 V VCC= 4.5 V 4.4 VCC= 5.5 V 5.4 VIN= VIH
33、or VILIOH= -4 mA VCC= 3.0 V 2.4 VIN= VIHor VILIOH= -24 mA VCC= 4.5 V 3.7 VCC= 5.5 V 4.7 VIN= VIHor VILIOH= -50 mA VCC= 5.5 V 3.85 Low-level output voltage 3006 VOL3/ VIN= VIHor VILIOL= 50 A VCC= 3.0 V 1, 2, 3 0.1 VCC= 4.5 V 0.1 VCC= 5.5 V 0.1 VIN= VIHor VILIOL= 12 mA VCC= 3.0 V 0.5 VIN= VIHor VILIOL
34、= 24 mA VCC= 4.5 V 0.5 VCC= 5.5 V 0.5 VIN= VIHor VILIOL= 50 mA VCC= 5.5 V 1.65 High-level input voltage VIH4/ VCC= 3.0 V 1, 2, 3 2.1 V VCC= 4.5 V 3.15 VCC= 5.5 V 3.85 Low-level input voltage VIL4/ VCC= 3.0 V 1, 2, 3 0.9 VCC= 4.5 V 1.35 VCC= 5.5 V 1.65 Input leakage current low 3009 IILVIN= 0.0 V VCC
35、= 5.5 V 1, 2, 3 -1.0 A Input leakage current high 3010 IIHVIN= 5.5 V VCC= 5.5 V 1, 2, 3 1.0 Quiescent supply current 3005 ICCVIN= VCCor GND VCC= 5.5 V 1, 2, 3 160 A Input capacitance 3012 CINSee 4.3.1c 4 8.0 pF Power dissipation capacitance CPD5/ See 4.3.1c 4 120 pF Functional tests 3014 6/ Tested a
36、t VCC= 3.0 V and repeated at VCC= 5.5 V, see 4.3.1d 7, 8 L H See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 SIZE A 5962-88702 REVIS
37、ION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test and MIL-STD-883 test method 1/ Symbol Test conditions -55C TC +125C 3.0 V VCC 5.5 V unless otherwise specified Group A subgroups Limits 2/ Unit Min Max Propagation delay time, CP to On 3003 tPHL
38、, tPLH7/ CL= 50 pF RL= 500 See figure 4 VCC= 3.0 V 9 1.0 12.0 ns VCC= 4.5 V 1.0 9.0 VCC= 3.0 V 10, 11 1.0 15.0 VCC= 4.5 V 1.0 11.0 Input set-up time, Dn to CP ts1 VCC= 3.0 V 9 6.5 ns VCC= 4.5 V 5.0 VCC= 3.0 V 10, 11 7.5 VCC= 4.5 V 6.0 Input hold time, Dn from CP th1VCC= 3.0 V 9 1.0 ns VCC= 4.5 V 2.0
39、 VCC= 3.0 V 10, 11 1.5 VCC= 4.5 V 2.5 Input set-up time, CE to CP ts2 VCC= 3.0 V 9 7.0 ns VCC= 4.5 V 5.0 VCC= 3.0 V 10, 11 9.5 VCC= 4.5 V 6.0 Input hold time, CE from CP th2VCC= 3.0 V 9 0.0 ns VCC= 4.5 V 1.0 VCC= 3.0 V 10, 11 1.0 VCC= 4.5 V 2.0 Pulse width, CP tw VCC= 3.0 V 9 5.5 ns VCC= 4.5 V 5.0 V
40、CC= 3.0 V 10, 11 6.5 VCC= 4.5 V 5.0 Maximum frequency, CP fMAXVCC= 3.0 V 9 85 MHz VCC= 4.5 V 95 VCC= 3.0 V 10, 11 75 VCC= 4.5 V 95 1/ For tests not listed in the referenced MIL-STD-883 (e.g.CPD), utilize the general test procedure under the conditions listed herein. All inputs and outputs shall be t
41、ested, as applicable, to the tests in table I herein. 2/ For negative and positive voltage and current values, the sign designates the potential difference in reference to GND and the direction of current flow, respectively; and the absolute value of the magnitude, not the sign, is relative to the m
42、inimum and maximum limits, as applicable, listed herein. 3/ The VOHand VOLtests shall be tested at VCC= 3.0 V and 4.5 V. The VOHand VOLtests are guaranteed, if not tested, for other values of VCC. Limits shown apply to operation at VCC= 3.3 V 0.3 V and VCC= 5.0 V 0.5 V. Tests with input current at +
43、50 mA or -50 mA are performed on only one input at a time with duration not to exceed 2 ms. Transmission driving tests may be performed using VIN= VCCor GND. When VIN= VCCor GND is used, the test is guaranteed for VIN= VIHminimum and VIL maximum. Provided by IHSNot for ResaleNo reproduction or netwo
44、rking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 SIZE A 5962-88702 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. 4/ VIHand VILtests are not required, and sha
45、ll be applied as forcing functions for VOHand VOLtests. 5/ Power dissipation capacitance (CPD) determines both the power consumption (PD) and dynamic current consumption (IS). Where: PD= (CPD+ CL) (VCCx VCC)f + (ICCx VCC) IS= (CPD+ CL) VCCf + ICCf is the frequency of the input signal and CLis the ex
46、ternal output load capacitance. 6/ Tests shall be performed in sequence, attributes data only. Functional tests shall include the truth table and other logic patterns used for fault detection. The test vectors used to verify the truth table shall, at a minimum, test all functions of each input and o
47、utput. All possible input to output logic patterns per function shall be guaranteed, if not tested, to the truth table in figure 2 herein. Functional tests shall be performed in sequence as approved by the qualifying activity on qualified devices. For VOUTmeasurements, L 0.3VCCand H 0.7VCC. 7/ AC li
48、mits at VCC= 5.5 V are equal to the limits at VCC= 4.5 V and guaranteed by testing at VCC= 4.5 V. AC limits at VCC= 3.6 V are equal to limits at VCC= 3.0 V and guaranteed by testing at VCC= 3.0 V. Minimum propagation delay limits for VCC= 5.5 V and VCC= 3.6V are 1.0 ns and guaranteed by guardbanding the VCC= 4.5 V and VCC= 3.0 V, respectively, minimum limits to 1.5 ns. For propagation delay tests, all paths must be tested. Device type 01 Case outline R, S and 2 Terminal number Terminal symbol 1 CE 2 O0 3 D0 4 D15 O1 6 O2 7 D
