1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Update boilerplate to MIL-PRF-38535 requirements. Editorial changes throughout. - jak 03-06-11 Thomas M. Hess B Update test condition for high level output voltage (VOH) and low level output voltage (VOL) in table I. Update boilerplate paragraphs
2、 to MIL-PRF-38535 requirement. - jak 10-02-12 Thomas M. Hess REV SHEET REV SHEET REV STATUS REV B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 PMIC N/A PREPARED BY James E. Nicklaus DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil STANDARD MICROCIRCUIT D
3、RAWING CHECKED BY Ray Monnin THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE APPROVED BY Michael A. Frye MICROCIRCUIT, DIGITAL, ADVANCED CMOS, QUAD 2-INPUT MULTIPLEXER WITH THREE-STATE OUTPUTS, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON DRAWING APPROVAL
4、DATE 88-09-26 AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 672685962-88704 SHEET 1 OF 11 DSCC FORM 2233 APR 97 5962-E119-10 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 4321
5、8-3990 SIZE A 5962-88704 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN i
6、s as shown in the following example: 5962-88704 01 E A Drawing number Device type Case outline Lead finish (see 1.2.1) (see 1.2.2) (see 1.2.3) 1.2.1 Device types. The device types identify the circuit function as follows: Device type Generic number Circuit function 01 54ACT258 Quad 2-input multiplex
7、er with three state outputs, TTL compatible inputs 1.2.2 Case outlines. The case outlines are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 Dual-in-line F GDFP2-F16 or CDFP3-F16 16 Flat pack 2 CQCC1-N20 20 Lead
8、less-chip-carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. 1/ 2/ Supply voltage range (VCC) -0.5 V dc to + 6.0 V dc DC input voltage range (VIN) -0.5 V dc to VCC+ 0.5 V dc DC output voltage range (VOUT) . -0.5 V dc to VCC+ 0.5 V d
9、c DC clamp current (IIK, IOK) 20 mA DC output current (IOUT) (per pin) . 50 mA DC VCCor GND current (ICCor IGND) 100 mA Storage temperature range (TSTG) . -65C to +150C Maximum power dissipation (PD) 500 mW Lead temperature (soldering, 10 seconds) +245C Thermal resistance, junction-to-case (JC) . Se
10、e MIL-STD-1835 Junction temperature (TJ) +175C 3/ 1.4 Recommended operating conditions. 1/ Supply voltage range (VCC) +4.5 V dc minimum to 5.5 V dc maximum Input voltage range (VIN) 0.0 V dc to VCCOutput voltage range (VOUT) 0.0 V dc to VCCCase operating temperature range (TC) . -55C to +125C Input
11、rise and fall rate (t/V): VCC= 4.5 V 0 to 10 ns/V VCC= 5.5 V 0 to 8 ns/V 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Unless otherwise specified, all voltages are re
12、ferenced to ground. 3/ Maximum junction temperature shall not be exceeded except for allowable short duration burn-in screening conditions in accordance with method 5004 of MIL-STD-883. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCI
13、RCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 SIZE A 5962-88704 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 2 APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to
14、the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Tes
15、t Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assis
16、t.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence.
17、 Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specifi
18、ed herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved pr
19、ogram plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not af
20、fect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535,
21、appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram
22、 shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 4. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY C
23、ENTER COLUMBUS COLUMBUS, OHIO 43218-3990 SIZE A 5962-88704 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating
24、 temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked w
25、ith the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked as listed in MIL-HDBK-103 (see 6.6 herein). For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the devi
26、ce. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML
27、 flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 and QML-38535 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an appro
28、ved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits del
29、ivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required in accordance with MIL-PRF-38535, appendix A. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable requi
30、red documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 SIZE A 596
31、2-88704 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test and MIL-STD-883 test method 1/ Symbol Test conditions -55C TC +125C 4.5 V VCC 5.5 V unless otherwise specified Group A subgroups Limits 2/ Unit Min Max High-level output voltage 3006 VOH3/ VI
32、H= 2.0 V or VIL= 0.8 V IOH= -50 A VCC= 4.5 V 1, 2, 3 4.4 V VCC= 5.5 V 5.4 VIH= 2.0 V or VIL= 0.8 V IOH= -24 mA VCC= 4.5 V 3.7 VCC= 5.5 V 4.7 VIH= 2.0 V or VIL= 0.8 V IOH= -50 mA VCC= 5.5 V 3.85 Low-level output voltage 3007 VOL3/ VIH= 2.0 V or VIL= 0.8 V IOL= 50 A VCC= 4.5 V 1, 2, 3 0.1 V VCC= 5.5 V
33、 0.1 VIH= 2.0 V or VIL= 0.8 V IOL= 24 mA VCC= 4.5 V 0.5 VCC= 5.5 V 0.5 VIH= 2.0 V or VIL= 0.8 V IOL= 50 mA VCC= 5.5 V 1.65 High-level input voltage VIH4/ VCC= 4.5 V 1, 2, 3 2.0 V VCC= 5.5 V 2.0 Low-level input voltage VIL4/ VCC= 4.5 V 1, 2, 3 0.8 V VCC= 5.5 V 0.8 Input leakage current low 3009 IILVI
34、N= 0.0 V VCC= 5.5 V 1, 2, 3 -1.0 A Input leakage current high 3010 IIHVIN= 5.5 V VCC= 5.5 V 1, 2, 3 1.0 Quiescent supply current delta, TTL input levels 3005 ICC 5/ VCC= 5.5 V For input under test, VIN= VCC- 2.1 V For all other inputs, VIN= VCCor GND 1, 2, 3 1.6 mA Quiescent supply current 3005 ICCH
35、VIN= VCCor GND VCC= 5.5 V IOUT= 0.0 mA 1, 2, 3 160 A ICCL160 ICCZ160 Three-state output leakage current high 3021 IOZH VIN= VCCor GND VCC= 5.5 V VOUT= 5.5 V or 0.0 V 1, 2, 3 10.0 A Three-state output leakage current low 3020 IOZL -10.0 Input capacitance 3012 CINSee 4.3.1c 4 8.0 pF Power dissipation
36、capacitance CPD6/ See 4.3.1c 4 60.0 pF Functional tests 3014 Tested at VCC= 4.5 V and repeated at VCC= 5.5 V, see 4.3.1d 7, 8 L H See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DEFENSE SUP
37、PLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 SIZE A 5962-88704 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test and MIL-STD-883 test method 1/ Symbol Test conditions -55C TC +125C 4.5 V VCC 5.5 V unless otherwise specified Group A subgro
38、ups Limits 2/ Unit Min Max Propagation delay time, In to Zn 3003 tPHL1, tPLH17/ VCC= 4.5 V CL= 50 pF RL= 500 See figure 4 9 1.0 8.5 ns 10, 11 1.0 10.5 Propagation delay time, S to Zn 3003 tPHL2, tPLH27/ 9 1.0 9.5 10, 11 1.0 13.0 Propagation delay time, output enable, OE to Zn 3003 tPZH, tPZL7/ 9 1.0
39、 9.0 10, 11 1.0 10.5 Propagation delay time, output disable, OE to Zn 3003 tPHZ, tPLZ7/ 9 1.0 9.0 10, 11 1.0 10.5 1/ For tests not listed in the referenced MIL-STD-883 (e.g.ICC), utilize the general test procedure under the conditions listed herein. All inputs and outputs shall be tested, as applica
40、ble, to the tests in table I herein. 2/ For negative and positive voltage and current values, the sign designates the potential difference in reference to GND and the direction of current flow, respectively; and the absolute value of the magnitude, not the sign, is relative to the minimum and maximu
41、m limits, as applicable, listed herein. 3/ VOHand VOLshall be tested at VCC= 4.5 V. VOHand VOLare guaranteed, if not tested, for VCC= 5.5 V. Limits shown apply to operation at VCC= 5.0 V 0.5 V. Transmission driving tests are performed at VCC= 5.5 V with a 2 ms duration maximum. 4/ VIHand VILtests ar
42、e not required, and shall be applied as forcing functions for VOHand VOLtests. 5/ This test may be performed either one input at a time (preferred method) or with all input pins simultaneously at VIN= VCC- 2.1 V (alternate method). Classes Q and V shall use the preferred method. When the test is per
43、formed using the alternate test method, the maximum limits are equal to the number of inputs at a high TTL input level times 1.6 mA; and the preferred method and limits are guaranteed. 6/ Power dissipation capacitance (CPD) determines the no load dynamic power consumption, PD= (CPD+ CL) (VCCx VCC)f
44、+ (ICCx VCC) + (n x d x ICCx VCC). The dynamic current consumption, IS= (CPD+ CL)VCCf + ICC+ n x d x ICC. For both PDand IS, n is the number of device inputs at TTL levels, f is the frequency of the input signal, and d is the duty cycle of the input signal. 7/ AC limits at VCC= 5.5 V are equal to li
45、mits at VCC= 4.5 V and guaranteed by testing at VCC= 4.5 V. The minimum ac limits are guaranteed for VCC= 5.5 V by guardbanding the VCC= 4.5 V limits to 1.5 ns minimum. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DEF
46、ENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 SIZE A 5962-88704 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 1 S NC2 I0a S 3 I1a I0a 4 Za I1a 5 I0b Za6 I1b NC 7 Zb I0b8 GND I1b 9 Zd Zb10 I1d GND 11 I0d NC 12 Zc Zd13 I1c I1d 14 I0c I0d 15 OE Zc 16 VCCNC 17 - - - I1c 18 - - - I0c 19 - - - OE
47、 20 - - - VCCNC = No internal connection FIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 SIZE A 5962-88704 REVISION LEVEL B SHEET 8
48、 DSCC FORM 2234 APR 97 Inputs Outputs OE S I0 I1 Z H L L L L X H H L L X X X L H X L H X X Z H L H L H = High voltage level L = Low voltage level Z = High impedance X = Immaterial FIGURE 2. Truth table. FIGURE 3. Logic diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 SIZE A 5962-88704 REVISION LEVEL B SHEET 9 DSCC FORM 22
