1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with Notice of Revision (NOR) 5962-R203-92 92-05-11 Michael A. Frye B Update drawing to reflect current requirements. New boilerplate. - les 00-11-27 Raymond Monnin C Update drawing to current requirements. Editorial changes
2、 throughout. - gap 08-04-04 Robert M. Heber The original first sheet of this drawing has been replaced. REV SHET REV SHET REV STATUS REV C C C C C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 PMIC N/A PREPARED BY Monica L. Poelking DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY
3、 Ray Monnin COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUIT, DIGITAL, BIPOLAR, ADVANCED LOW POWER SCHOTTKY TTL, OCTAL BUS AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 88-09-06 TRANSCEIVE
4、RS, MONOLITHIC SILICON AMSC N/A REVISION LEVEL C SIZE A CAGE CODE 67268 5962-88727 SHEET 1 OF 9 DSCC FORM 2233 APR 97 5962-E029-08 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88727 DEFENSE SUPPLY CENTER C
5、OLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The compl
6、ete PIN is as shown in the following example: 5962-88727 01 R X Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54ALS640 Octal bus tr
7、ansceivers, inverting, with three-state outputs 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style R GDIP1-T20 or CDIP2-T20 20 Dual-in-line package S GDFP2-F20 or CDFP3-F20 20 Flat package 2 CQCC1
8、-N20 20 Square chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage range -0.5 V dc minimum to +7.0 V dc maximum Input voltage range: All inputs . -1.5 V dc to +7.0 V dc I/O ports -1.5 V dc to +5.5 V dc Continuous
9、power dissipation (PD) 1/ +264 mW Storage temperature range -65C to +150C Lead temperature (soldering, 10 seconds) . +300C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) . +175C 1.4 Recommended operating conditions. Supply voltage range (VCC) . +4.5 V dc minim
10、um to +5.5 V dc maximum Minimum high level input voltage (VIH) . 2.0 V dc Maximum low level input voltage (VIL) 0.7 V dc Maximum high level output current (IOH) . -12 mA maximum Maximum low level output current (IOL) . 12 mA Case operating temperature range (TC) . -55C to +125C _ 1/ Maximum power di
11、ssipation is defined as VCCx ICC, and must withstand the added PDdue to output current test; e.g., IO. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88727 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218
12、-3990 REVISION LEVEL C SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these docum
13、ents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Comp
14、onent Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardizatio
15、n Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applica
16、ble laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produ
17、ced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accorda
18、nce with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certi
19、fication mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case o
20、utlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth tables. The truth tables shall be as specified on figure 2. 3.2.4 Switching waveforms and test circuit. The switching waveforms and test circuit shall
21、 be as specified on figure 3. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test re
22、quirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88727 DEFENSE SUPPLY CENTER COLUMBUS C
23、OLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 4 DSCC FORM 2234 APR 97 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the ent
24、ire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The complian
25、ce indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of sup
26、ply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A cer
27、tificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DSCC, DS
28、CCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures sh
29、all be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-
30、883. (1) Test condition A or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applic
31、able, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer
32、. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88727 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics.
33、 Test Symbol Conditions 1/ -55C TC+125C unless otherwise specified Group A subgroups Limits Unit Min Max IOH= -0.4 mA 2.5 IOH= -3.0 mA 2.4 High level output voltage VOHVCC= 4.5 V, VIH= 2.0 V, VIL= 0.7 V IOH= -12 mA 1, 2, 3 2.0 V Low level output voltage VOLVCC= 4.5 V, IOL= 12 mA VIH= 2.0 V, VIL= 0.7
34、 V 1, 2, 3 0.4 V Input clamp voltage VICVCC= 4.5 V, IIN= -18 mA 1, 2, 3 -1.5 V Control inputs 20 High level input current IIH1VCC= 5.5 V, VIN= 2.7 V A or B ports 1/ 1, 2, 3 20 A A or B ports VIN= 5.5 V 0.1 IIH2VCC= 5.5 V Control inputs VIN= 7.0 V 1, 2, 3 0.1 mA Control inputs -0.1 Low level input cu
35、rrent IILVCC= 5.5 V, VIN= 0.4 V A or B ports 1/ 1, 2, 3 -0.1 mA Output current IOVCC= 5.5 V, VOUT= 2.25 V 2/ 1, 2, 3 -20 -112 mA Outputs high 50 Outputs low 60 Supply current ICCVCC= 5.5 V Outputs disabled 1, 2, 3 55 mA Functional tests See 4.3.1c 7, 8 Propagation delay time, tPLH9, 10, 11 2 18 ns A
36、 or B to B or A tPHL15 tPZH9, 10, 11 4 29 ns Output enable time, G to A or B tPZL5 27 Output disable time, tPHZ9, 10, 11 2 12 ns G to A or B tPLZ VCC= 4.5 V to 5.5 V, CL= 50 pF, R1= 500 , R2= 500 , See figure 3 3 20 1/ For I/O ports, the parameters IIHand IILinclude the off state output current. 2/
37、The output conditions have been chosen to produce a current that closely approximates one-half of the true short circuit output current, IOS. Not more than one output shall be tested at one time and the duration of the short circuit condition shall not exceed one second. Provided by IHSNot for Resal
38、eNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88727 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 6 DSCC FORM 2234 APR 97 Case outlinesR, S, and 2 Terminal number Terminal connection 1 DIR Control inp
39、uts 2 A1 GDIR Operation 3 A2 L L B data to A bus4 A3 L H A data to B bus5 A4 H X Isolation 6 A5 H = High voltage level 7 A6 L = Low voltage level 8 A7 X = Irrelevant 9 A8 10 GND 11 B8 FIGURE 2. Truth table. 12 B7 13 B6 14 B5 15 B4 16 B3 17 B2 18 B1 19 G20 VCC FIGURE 1. Terminal connections. Provided
40、 by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88727 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 7 DSCC FORM 2234 APR 97 NOTES: 1. CLincludes probe and jig capacitance. 2. All inp
41、ut pulses have the following characteristics: PRR 10 MHz, duty cycle = 50 percent, tr= tf= 3 ns 1 ns. 3. When measuring propagation delay times of three-state outputs, switch S1 is open. 4. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the o
42、utput control. 5. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. 6. The outputs are measured one at a time with one input transition per measurement. FIGURE 3. Switching waveforms and test circuit. LOAD CIRCUIT FOR THREE
43、STATE OUTPUTS VOLTAGE WAVEFORMS, PROPAGATION DELAY TIMES VOLTAGE WAVEFORMS, ENABLE AND DISABLE TIMES, THREE-STATE OUTPUTS Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88727 DEFENSE SUPPLY CENTER COLUMBUS C
44、OLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 8 DSCC FORM 2234 APR 97 TABLE II. Electrical test requirements. MIL-STD-883 test requirements Subgroups (in accordance with MIL-STD-883, method 5005, table I) Interim electrical parameters (method 5004) - - - Final electrical test parameters (method 50
45、04) 1*, 2, 3, 7, 8, 9, 10, 11 Group A test requirements (method 5005) 1, 2, 3, 7, 8, 9, 10, 11 Groups C and D end-point electrical parameters (method 5005) 1, 2, 3 * PDA applies to subgroup 1. 4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with method 5005
46、of MIL-STD-883 including groups A, B, C, and D inspections. The following additional criteria shall apply. 4.3.1 Group A inspection. a. Tests shall be as specified in table II herein. b. Subgroups 4, 5, and 6 in table I, method 5005 of MIL-STD-883 shall be omitted. c. Subgroups 7 and 8 shall include
47、 verification of the truth table. 4.3.2 Groups C and D inspections. a. End-point electrical parameters shall be as specified in table II herein. b. Steady-state life test conditions, method 1005 of MIL-STD-883. (1) Test condition A or D. The test circuit shall be maintained by the manufacturer under
48、 document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of MIL-STD-883. (2) TA= +125C, minimum. (3) Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88
