1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with Notice of Revision (NOR) 5962-R299-92 92-09-02 Michael A. Frye B Update drawing to reflect current requirements. New boilerplate. -les 00-11-27 Raymond Monnin C Update drawing to current requirements. Editorial changes
2、throughout. - gap 08-04-04 Robert M. Heber The original first sheet of this drawing has been replaced. REV SHET REV SHET REV STATUS REV C C C C C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 PMIC N/A PREPARED BY Christopher A. Rauch DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED B
3、Y D. H. Johnson COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUIT, DIGITAL, BIPOLAR, ADVANCED LOW POWER SCHOTTKY TTL, OCTAL D-TYPE AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 88-10-11 EDG
4、E TRIGGERED FLIP-FLOPS, MONOLITHIC SILICON AMSC N/A REVISION LEVEL C SIZE A CAGE CODE 67268 5962-88728 SHEET 1 OF 9 DSCC FORM 2233 APR 97 5962-E030-08 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88728 DEF
5、ENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Num
6、ber (PIN). The complete PIN is as shown in the following example: 5962-88728 01 R X Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 5
7、4ALS564 Octal D-type edge-triggered flip-flops with three-state outputs 1.2.2 Case outlines. The case outlines are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style R GDIP1-T20 or CDIP2-T20 20 Dual-in-line S GDFP2-F20 or CDFP3-F20 20 Flat pac
8、k 2 CQCC1-N20 20 Square chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage range -0.5 V dc minimum to +7.0 V dc maximum Input voltage range . -1.2 V dc at -18 mA to +7.0 V dc Voltage applied to a disabled three-s
9、tate output . +5.5 V dc Storage temperature . -65C to +150C Maximum power dissipation (PD) 1/ . 165 mW Lead temperature (soldering, 10 seconds) . +300C Thermal resistance, junction-to-case (JC) See MIL-STD-1835 Junction temperature (TJ) . +175C 1.4 Recommended operating conditions. Supply voltage ra
10、nge (VCC) . +4.5 V dc minimum to +5.5 V dc maximum Minimum high level input voltage (VIH) 2.0 V dc Maximum low level input voltage (VIL): TC= +125C 0.7 V TC= -55C . 0.8 V TC= +25C 0.8 V High level output current (IOH) . -1.0 mA maximum Low level output current (IOL) 12 mA maximum Case operating temp
11、erature range (TC) -55C to +125C Pulse duration tW, CLK high or low . 20 ns minimum Setup time data before CLK, low or high (tsu) . 15 ns minimum Hold time data after CLK, low to high (th) 4 ns minimum _ 1/ Maximum power dissipation is defined as VCCx ICC, and must withstand the added PDdue to outpu
12、t current test; e.g., IO. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88728 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS
13、2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE S
14、PECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of S
15、tandard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 1911
16、1-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. RE
17、QUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufac
18、turer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management
19、 (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when t
20、he QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections.
21、 The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 3. 3.3 Electrical performance characteristics. Unles
22、s otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests f
23、or each subgroup are described in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88728 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 4 DSCC FORM 2234 APR 97 3.5 Mar
24、king. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer h
25、as the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in ac
26、cordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted t
27、o DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provi
28、ded with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufactu
29、rers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening s
30、hall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A or D. The test circuit shall be maintained by the man
31、ufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2
32、) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. Provided by IHSNot for ResaleNo reproduction or networking permitted without
33、license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88728 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ -55C TC+125C unless otherwise specified Group A subg
34、roups Limits Unit Min Max VIL= 0.8 V 1, 3 VCC= 4.5 V, IOH= -0.4 mA, VIH= 2.0 V 2/ VIL= 0.7 V 2 2.5 V VIL= 0.8 V 1, 3 High level output voltage VOHVCC= 4.5 V, IOH= -1.0 mA, VIH= 2.0 V 2/ VIL= 0.7 V 2 2.4 V VIL= 0.8 V 1, 3 Low level output voltage VOLVCC= 4.5 V, VIH= 2.0 V, IOL= 12 mA 2/ VIL= 0.7 V 2
35、0.4 V Input clamp voltage VICVCC= 4.5 V, IIN= -18 mA 1, 2, 3 -1.2 V Low level input current IILVCC= 5.5 V, VIN= 0.4 V, All other inputs 4.5 V 1, 2, 3 -0.2 mA High level input current IIH1VCC= 5.5 V, VIN= 2.7 V, All other inputs = 0.0 V 1, 2, 3 20 A IIH2VCC= 5.5 V, VIN= 7.0 V, All other inputs = 0.0
36、V 1, 2, 3 0.1 mA Output current IOVCC= 5.5 V, VOUT= 2.25 V 3/ 1, 2, 3 -20 -112 mA IOZH VCC= 5.5 V, VOUT= 2.7 V 1, 2, 3 20 A Output current, outputs off IOZLVCC= 5.5 V, VOUT= 0.4 V 1, 2, 3 -20 A Outputs high 18 Outputs low 24 Supply current ICCVCC= 5.5 V Outputs disabled 1, 2, 3 30 mA Functional test
37、s GND VIL VOL, VOH VIH VCCSee 4.3.1c 7, 8 Clock frequency fmax 9, 10, 11 25 MHz tPLH9, 10, 11 4 16 ns Propagation delay time from CLK to any Q tPHL19 tPZH9, 10, 11 4 21 ns Output enable time from OC to any Q tPZL3 Output disable time tPHZ9, 10, 11 2 12 ns from OC to any Q tPLZ VCC= 4.5 to 5.5 V, CL=
38、 50 pF, R1= 500 , R2= 500 , See figure 3 4/ 3 20 1/ Unused inputs that do not directly control the pin under test must be 2.5 V dc or 0.4 V. No unused inputs shall exceed 5.5 V or go less than 0.0 V. No inputs shall be floated. 2/ All outputs must be tested. In the case where only one input at VILma
39、ximum or VIHminimum produces the proper output state, the test must be performed with each input being selected as the VILmaximum or VIHminimum input. 3/ The output conditions have been chosen to produce a current that closely approximates one-half of the true short circuit output current, IOS. Not
40、more than one output will be tested at one time and the duration of the test condition shall not exceed one second. 4/ Propagation delay limits are based on single output switching. Unused inputs = 3.5 V or 0.3 V. Provided by IHSNot for ResaleNo reproduction or networking permitted without license f
41、rom IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88728 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 6 DSCC FORM 2234 APR 97 Case outlines R, S, and 2 Terminal number Terminal connection 1 OC Inputs Outputs 2 1DOC CLK D Q 3 2D L H L 4 3DL L H 5 4D L L X Q0 6 5D
42、H X X Z 7 6D 8 7D9 8D 10 GND11 CLK 12 8 Q L = Low voltage level H = High voltage level = Transition from low to high X = Irrelevant Q0= Q level before steady-state input conditions were established. 13 7 Q 14 6 Q FIGURE 2. Truth table. 15 5 Q 16 4 Q 17 3 Q 18 2 Q 19 1 Q 20 VCC FIGURE 1. Terminal con
43、nections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88728 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 7 DSCC FORM 2234 APR 97 NOTES: 1. CLincludes probe and jig capac
44、itance. 2. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. 3. All input pulses have the following
45、 characteristics: PRR 10 MHz, duty cycle = 50%, tr= tf= 3 ns 1 ns. 4. When measuring propagation delay times of three-state outputs, switch S1 is open. 5. The outputs are measured one at a time with one input transition per measurement. FIGURE 3. Switching waveforms and test circuit. Provided by IHS
46、Not for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88728 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 8 DSCC FORM 2234 APR 97 TABLE II. Electrical test requirements. MIL-STD-883 test requirem
47、ents Subgroups (in accordance with MIL-STD-883, method 5005, table I) Interim electrical parameters (method 5004) - - - Final electrical test parameters (method 5004) 1*, 2, 3, 7, 8, 9, 10, 11 Group A test requirements (method 5005) 1, 2, 3, 7, 8, 9, 10, 11 Groups C and D end-point electrical parame
48、ters (method 5005) 1, 2, 3 * PDA applies to subgroup 1. 4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with method 5005 of MIL-STD-883 including groups A, B, C, and D inspections. The following additional criteria shall apply. 4.3.1 Group A inspection. a. Tests shall be as specified in table II herein. b. Subgroups 4, 5, and 6 in table I, method 5005 of MIL-STD-883 shall be omitted. c. Subgroups 7 and 8 shall include verification of the truth table. 4.3.2 Groups C and D inspections. a
