1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add case outline 3. Add vendor CAGE 1ES66. Made changes to tables I and II, and figures 1 and 2 91-09-17 M. A. FRYE B Update drawing to current requirements. Editorial changes throughout. - drw 04-07-08 R. MONNIN C Make correction to the Mode 1 t
2、iming waveform as specified under figure 3. - ro 06-01-18 R. MONNIN THE ORIGINAL FIRST SHEET OF THIS DRAWING HAS BEEN REPLACED. REV SHET REV SHET REV STATUS REV C C C C C C C C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY GARY ZAHN DEFENSE SUPPLY CENTER COLUMBUS STANDARD M
3、ICROCIRCUIT DRAWING CHECKED BY CHARLES E. BESORE COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY WILLIAM K. HECKMAN AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 89-08-07 MICROCIRCUIT, DIGITAL-LINEAR, 8-BIT A/D CONVE
4、RTERS, HIGH SPEED, MONOLITHIC SILICON AMSC N/A REVISION LEVEL C SIZE A CAGE CODE 67268 5962-88764 SHEET 1 OF 12 DSCC FORM 2233 APR 97 5962-E104-06 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88764 DEFENSE
5、 SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number
6、(PIN). The complete PIN is as shown in the following example: 5962-88764 01 L A Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function Total un
7、adjusted error 01 7824T 4-channel 8-bit A/D converter 1.0 LSB 02 7824U 4-channel 8-bit A/D converter 0.5 LSB 03 7828T 8-channel 8-bit A/D converter 1.0 LSB 04 7828U 8-channel 8-bit A/D converter 0.5 LSB 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outl
8、ine letter Descriptive designator Terminals Package style 3 CQCC1-N28 28 Square leadless chip carrier L GDIP3-T24 or CDIP4-T24 24 Dual-in-line X GDIP1-T28 or CDIP2-T28 28 Dual-in-line 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. VDDto
9、 ground range 0 V dc to +7 V dc Digital input voltage to ground (RD , CS , A0, A1 and A2) . -0.3 V dc to VDDDigital output voltage to ground (DB0, DB7, RDY and INT ) -0.3 V dc to VDDVREF(+) to ground VREF(-) to VDDVREF(-) to ground . 0 V dc to VREF(+) Analog input, any channel -0.3 V dc to VDDStorag
10、e temperature range . -65C to +150C Lead temperature (soldering, 10 seconds) . +300C Power dissipation (PD) . 450 mW 1/ Thermal resistance, junction-to-case (JC) See MIL-STD-1835 Thermal resistance, junction-to-ambient (JA) (all cases) 120C/W Junction temperature (TJ) +175C _ 1/ Derate above TA= +75
11、C at 6.0 mW/C for case outlines L, X, and 3. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88764 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 3 DSCC FORM 2234 APR 97 1.4 R
12、ecommended operating conditions. Supply voltage range (VDD) . +4.75 V dc to +5.25 V dc Positive reference voltage VREF(+) +5.0 V dc Negative reference voltage VREF(-) . 0 V dc Ground potential (GND) . 0 V dc Ambient operating temperature range (TA) -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Governmen
13、t specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION
14、MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Micro
15、circuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2
16、Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.
17、1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a ma
18、nufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan ma
19、y make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow o
20、ption is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal
21、 connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full am
22、bient operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I.Provided by IHSNot for ResaleNo reproduction or networking permitted without license fro
23、m IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88764 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 4 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/, 2/ -55C TA +125C unless otherwise specified Group A subgroups
24、Device type Limits Unit Min MaxResolution RES Guaranteed minimum resolution for which no codes are missing 1, 2, 3 All 8.0 Bits Total unadjusted error 3/ TUE 1, 2, 3 01, 03 1.0 LSB 1 02, 04 1.02, 3, 12 0.5 Analog input leakage current IINAny channel 1, 2, 3 All 3.0 A Reference input 4/ resistance RI
25、N1, 2, 3 All 1.0 4.0 k Digital input high voltage VIHRD , CS , A0, A1, A2 5/ 1, 2, 3 All 2.4 V Digital input low voltage VILRD , CS , A0, A1, A2 5/ 1, 2, 3 All 0.8 V Digital input high current IIHRD , CS , A0, A1, A2 5/ 1, 2, 3 All 1.0 A Digital input low current IILRD , CS , A0, A1, A2 5/ 1, 2, 3 A
26、ll -1.0 A Digital output high voltage VOHDB0 DB7, INT , ISOURCE= 360 A 1, 2, 3 All 4.0 V Digital output low voltage VOLDB0 DB7, INT , ISINK= 1.6 mA 1, 2, 3 All 0.4 V RDY, ISINK= 2.6 mA 6/ 0.4 Floating state leakage current IOUTDB0 DB7only 1, 2, 3 All 3.0 A Supply current from VDDIDDCS = RD = 2.4 V 1
27、, 2, 3 All 20 mA Power supply sensitivity PSS VDD= +5.0 V 5.0% 1, 2, 3 All 0.25 LSB Analog input capacitance 4/ CIN10 V to 5.0 V, TA= +25C 4 All 45 pF Digital input capacitance 4/ CIN2RD , CS , A0, A1, A2 5/ TA= +25C 4 All 8.0 pF Digital output 4/ capacitance COUTTA= +25C 4 All 8.0 pF Slew rate, tra
28、cking 4/ SR TA= +25C 4 All 0.157 V/s Functional tests See 4.3.1d and figure 2 7, 8 All See footnotes at end of table.Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88764 DEFENSE SUPPLY CENTER COLUMBUS COLUMB
29、US, OHIO 43218-3990 REVISION LEVEL C SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - continued. Test Symbol Conditions 1/, 2/ -55C TA +125C unless otherwise specified Group A subgroups Device type Limits Unit Min MaxCS to RD setup time tCSSSee figure 3 9, 10, 11 All 0
30、 ns CS to RD hold time tCSHSee figure 3 9, 10, 11 All 0 ns CS to RDY delay tRDYCL= 50 pF, 9 All 40 ns pull-up resistor = 5.0 k, see figure 3 10, 11 60 Conversion time, mode 0 tCRDSee figure 3 9 All 2.0 s 10, 11 2.8 Data access time after RD , tACC1See figure 3 7/ 8/ 9 All 85 ns mode 1 10, 11 120 RD
31、to INT delay tINTHCL= 50 pF 9 All 75 ns 10, 11 100 Data hold time tDHSee figure 3 and 4 9/ 9 All 60 ns 10, 11 70 Delay time between conversions tPSee figure 3 9 All 500 ns 10, 11 600 Read pulse width, mode 1 tRDSee figure 3 9 All 60 600 ns 10, 11 80 400 Data access time after INT tACC2See figure 3 7
32、/ 8/ 9 All 50 ns 10, 11 70 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88764 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 6 DSCC FORM 2234
33、 APR 97 TABLE I. Electrical performance characteristics - continued. Test Symbol Conditions 1/, 2/ -55C TA +125C unless otherwise specified Group A subgroups Device type Limits Unit Min MaxMultiplexer address setup time tASSee figure 3 9, 10, 11 All 0 ns Multiplexer address hold time tAHSee figure 3
34、 9 All 30 ns 10, 11 40 1/ VDD= +5.0 V, VREF(+) = +5.0 V, and VREF(-) = GND = 0 V unless otherwise specified. Specifications apply for mode 0. All input control signals are specified with tr= tf= 20 ns (10% to 90% of +5.0 V) and timed from a voltage level of 1.6 V. 2/ Subgroups 10 and 11, if not test
35、ed, shall be guaranteed to the limits specified in table I. 3/ Total unadjusted error includes offset, full scale, and linearity errors. 4/ The (CIN1, CIN2, RIN, COUT, and SR measurements) are measured initially and after any process or design changes which may affect these tests. 5/ A2 applies to d
36、evice types 03 and 04 only. 6/ RDY is an open drain output. 7/ Measured with load circuits of figure 5 and defined as the time required for an output to cross 0.8 V or 2.4 V. 8/ If not tested, shall be guaranteed to the limits specified in table I herein. 9/ Defined as the time required for the data
37、 lines to change 0.5 V when loaded with the circuits of figure 4 and is measured only for the initial test and after process or design changes which may affect tDH. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein.
38、 In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be
39、 marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compli
40、ance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of
41、 MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shal
42、l be required for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the
43、 reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88764 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 7 DSCC FORM 2234 APR 97 Device types 01 and 02 03 and 04 Case o
44、utlines L X and 3 Terminal number Terminal symbol 1 AIN 4 AIN 6 2 AIN 3 AIN 5 3 AIN 2 AIN 4 4 AIN 1 AIN 3 5 NC AIN 2 6 DB0 AIN 1 7 DB1 NC 8 DB2 DB0 9 DB3 DB1 10 RD DB2 11 INT DB3 12 GND RD 13 VREF(-) INT 14 VREF(+) GND 15 RDY VREF(-) 16 CS VREF(+) 17 DB4 RDY 18 DB5 CS 19 DB6 DB4 20 DB7 DB5 21 A1 DB6
45、 22 A0 DB7 23 NC A2 24 VDDA1 25 - - - A0 26 - - - VDD27 - - - AIN 8 28 - - - AIN 7 NC = No connection FIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88764 DEFENSE SUPPLY CENTE
46、R COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 8 DSCC FORM 2234 APR 97 Device types 01 and 02 Device types 03 and 04 A1 A0 A2 A1 A0 Channel 0 0 0 0 0 AIN 1 0 1 0 0 1 AIN 2 1 0 0 1 0 AIN 3 1 1 0 1 1 AIN 4 1 0 0 AIN 5 1 0 1 AIN 6 1 1 0 AIN 7 1 1 1 AIN 8 0 = Logic low state 1 = Logic high
47、state FIGURE 2. Truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88764 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 9 DSCC FORM 2234 APR 97 NOTES: 1. All input s
48、ignal rise and fall times are measured from 10% to 90% of +5.0 V, tr= tf= 20 ns. 2. Timing measurements reference level is ( VIH+ VIL) / 2. FIGURE 3. Timing diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88764 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 10 DSCC FORM 2234 APR 97 FIGURE 4. Load circuits for data hold time.
