1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Update to reflect current requirements. Editorial changes throughout. - drw 02-10-15 Raymond Monnin THE ORIGINAL FIRST PAGE OF THIS DRAWING HAS BEEN REPLACED REV SHET REV SHET REV STATUS REV A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 1
2、0 PMIC N/A PREPARED BY Rick Officer DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY William J. Johnson COLUMBUS, OHIO 43216 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUIT, CMOS, 12-BIT BUFFERED MULTIPLYING,
3、 DIGITAL TO ANALOG AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 89-05-18 CONVERTER, MONOLITHIC SILICON AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-88778 SHEET 1 OF 10 DSCC FORM 2233 APR 97 5962-E016-03 DISTRIBUTION STATEMENT A. Approved for public release; distribution i
4、s unlimited.Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88778 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing descr
5、ibes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-88778 01 R A Drawing number Device type (see 1.2.1) Case outline (se
6、e 1.2.2) Lead finish (see 1.2.3) 1.2.1 Device types. The device types identify the circuit function as follows: Device type Generic number Circuit function 01 7645A CMOS 12-bit buffered multiplying DAC 02 7645B CMOS 12-bit buffered multiplying DAC 1.2.2 Case outlines. The case outlines are as design
7、ated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X GDIP1-T20 or CDIP2-T20 20 dual-in-line 2 CQCC1-N20 20 Square leadless chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. VDDto
8、 DGND . -0.3 V dc to +17 V dc Supply voltage range . +5 V dc to +17 V dc VREFto GND. -0.3 V dc to +17 V dc Digital input voltage to DGND -0.3 V dc to VDDVRFB, VREFto DGND. 25 V dc VOUTto DGND -0.3 V dc to VDDAGND to DGND. -0.3 V dc to VDDPower dissipation (PD): Up to +75C . 450 mW Derate above +75C
9、6 mW/C Storage temperature range -65C to +150C Lead temperature (soldering, 10 seconds) +300C Thermal resistance, junction-to-case (JC) See MIL-STD-1835 Thermal resistance, junction-to-ambient (JA): Case R 120C/W Case 2 110C/W Junction temperature (TJ) +150C 1.4 Recommended operating conditions. Ope
10、rating ambient temperature range (TA). -55C to +125C Reference voltage (VREF) . +10 V dc Supply voltage +15 V dc Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88778 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS,
11、OHIO 43216-5000 REVISION LEVEL A SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of t
12、hese documents are those listed in the issue of the Department of Defense Index of Specifications and Standards (DoDISS) and supplement thereto, cited in the solicitation. SPECIFICATION DEPARTMENT OF DEFENSE MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. STANDARDS DEP
13、ARTMENT OF DEFENSE MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. HANDBOOKS DEPARTMENT OF DEFENSE MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Unless otherwise indicated
14、, copies of the specification, standards, and handbooks are available from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the
15、 text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-J
16、AN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accord
17、ance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the d
18、evice. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions s
19、hall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections and mode selection. The terminal connections and mode selection shall be as specified on figure 1. 3.2.3 Functional and timing dia
20、grams. The functional and timing diagrams shall be as specified on figure 2. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full ambient operating temperature range. Provid
21、ed by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88778 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 3.4 Electrical test requirements. The electrical test re
22、quirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may als
23、o be marked as listed in MIL-HDBK-103 (see 6.6 herein). For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be
24、 marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compli
25、ance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of
26、 MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shal
27、l be required in accordance with MIL-PRF-38535, appendix A. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of
28、 the reviewer. 4. QUALITY ASSURANCE PROVISIONS 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to qualit
29、y conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acqui
30、ring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in t
31、able II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88778 DEFENSE SUPPLY CENTER COLUM
32、BUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL A SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TA +125C unless otherwise specified Group A subgroups Device type Limits Unit 1/ Min Max Resolution RES 1, 2, 3 All 12 Bits Relative accuracy RA 1
33、, 2, 3 All .5 LSB Output leakage current 2/ IOUTDB0 to DB11 = 0 V, 1 All 10 nA WR , CS = 0 V 2, 3 200 Differential nonlinearity DNL 12-bit monotonic 1, 2, 3 All 1 LSB Power supply rejection PSRR VDD= 5% 1 All .002 %/% 2, 3 .004 Gain error 3/ GFSEDac register loaded with 1 01 1 LSB 1111 1111 1111 2,
34、3 2 1 02 3 2, 3 4 Referenced input resistance, VREFto ground RIN1, 2, 3 All 7 25 k Digital input high voltage VIH1, 2, 3 All 2.4 V Digital input low voltage VIL1, 2, 3 All 0.8 V Digital input leakage current IIN1 All 1 A 2, 3 10 Gain temp. coefficient TCAE 4/ 1, 2, 3 All 5 ppm/C Feedthrough error FT
35、VREF= 10 V, 10 kHz sinewave 4/, 5/ 4, 5, 6 All 10 mVP-PSupply current from VDDIDDAll digital inputs = 0 or VDD1, 2, 3 All 100 A All digital inputs = VILor VIH1, 2, 3 All +2 mA Digital input capacitance CINTA= +25C, VIN= 0 V DB0 to DB11, WR , CS 6/ 4 All 8 pF See footnotes at end of table. Provided b
36、y IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88778 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL A SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - continued.
37、 Test Symbol Conditions -55C TA +125C unless otherwise specified Group A subgroups Device type Limits Unit 1/ Min Max Output capacitance COUT1DB0 to DB11 = 0 V, 6/ WR ,CS = 0 V,TA= +25C 4 All 25 pF Output capacitance COUT2DB0 to DB11 = VDD, 6/ WR ,CS = 0 V,TA= +25C 4 All 50 pF Chip select to write s
38、etup time tCS7/, 8/ 9 All 150 ns 10, 11 210 Chip select to write hold time tCH7/, 8/ 9, 10, 11 All 0 ns Write pulse width tWRtCS= tWR, tCH= 0 7/, 8/ 9 All 150 ns 10, 11 210 Data setup time tDS7/, 8/ 9 All 225 ns10, 11 300 Data hold time tDH7/, 8/ 9, 10, 11 All 10 ns 1/ VREF= +10 V, VOUT= AGND = DGND
39、 = 0 V, VDD= +15 V unless otherwise specified. 2/ DAC loaded with 0000 0000 0000. 3/ Measured using internal feedback resistor and includes effect of 5 ppm maximum gain TC. 4/ If not tested, shall be guaranteed to the limits specified in table I herein. 5/ Feedthrough error can be reduced by connect
40、ing the metal lid to ground. 6/ See 4.3.1c. 7/ Timing in accordance with figure 2. 8/ Subgroups 10 and 11 guaranteed, if not tested, to the limits specified in table I herein. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAW
41、ING SIZE A 5962-88778 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL A SHEET 7 DSCC FORM 2234 APR 97 Device type All Case outline R and 2 Terminal number Terminal symbol 1 OUT 2 AGND 3 DGND 4 DB11(MSB) 5 DB10 6 DB9 7 DB8 8 DB7 9 DB6 10 DB5 11 DB4 12 DB3 13 DB2 14 DB1 15 DB0(
42、LSB) 16 CS 17 WR 18 VDD19 VREF20 RFBMode selection Write mode Hold modeCS and WR low, DAC responds to data bus (DB0-DB11 inputs). Either CS and WR high. data bus (DB0-DB11) is locked out; DAC holds last data present when CS or WR assumed high state FIGURE 1. Terminal connections and mode selection.
43、Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88778 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL A SHEET 8 DSCC FORM 2234 APR 97 FIGURE 2. Functional and timing diagrams. Provided
44、 by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88778 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL A SHEET 9 DSCC FORM 2234 APR 97 TABLE II. Electrical test requirements. MIL-STD-883 test r
45、equirements Subgroups (in accordance with MIL-STD-883, method 5005, table I) Interim electrical parameters (method 5004) 1 Final electrical test parameters (method 5004) 1*, 2, 3 Group A test requirements (method 5005) 1, 2, 3, 4, 5, 6, 9, 10*, 11* Groups C and D end-point electrical parameters (met
46、hod 5005) 1 * PDA applies to subgroup 1. * Subgroups 10 and 11, if not tested, shall be guaranteed to the specified limits in table I. 4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with method 5005 of MIL-STD-883 including groups A, B, C, and D inspections
47、. The following additional criteria shall apply. 4.3.1 Group A inspection. a. Tests shall be as specified in table II herein. b. Subgroups 7 and 8 in table I, method 5005 of MIL-STD-883 shall be omitted. c. Subgroup 4 (Capacitance measurement) shall be measured only for the initial test and after pr
48、ocess or design changes which may affect input capacitance. Sample size is fifteen devices, all input and output terminals tested, and no failures. 4.3.2 Groups C and D inspections. a. End-point electrical parameters shall be as specified in table II herein. b. Steady-state life test conditions, met
49、hod 1005 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power diss
