1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with N.O.R. 5962-R092-92. 92-01-24 M. A. FRYE B Drawing updated to reflect current requirements. - ro 01-06-19 R. MONNIN C Add device class V device. - ro 02-03-29 R. MONNIN D Update standard SMD paragraphs. -rrp 09-03-02 R.
2、 HEBER THE ORIGINAL FIRST SHEET OF THIS DRAWING HAS BEEN REPLACED. REV SHET REV SHET REV STATUS REV D D D D D D D D D D D OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 PMIC N/A PREPARED BY JOSEPH A. KERBY DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY CHARLES E. BESORE COLUMBUS, O
3、HIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY MONICA L. POELKING MICROCIRCUIT, LINEAR, ISOLATED FEEDBACK GENERATOR, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 90-03-15 AMSC N/A REVISION LEVEL D SIZE A CA
4、GE CODE 67268 5962-89441 SHEET 1 OF 11 DSCC FORM 2233 APR 97 5962-E593-07 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89441 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET
5、2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying
6、 Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN is as shown in the following examples. For device classes M and Q: 5962 - 89441 01 C A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2)Case
7、 outline (see 1.2.4)Lead finish (see 1.2.5) / / Drawing number For device class V: 5962 - 89441 01 V C A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2)Device class designatorCase outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA d
8、esignator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-
9、) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 UC1901 Isolated feedback generator 1.2.3 Device class designator. The device class designator is a single letter identifying the product ass
10、urance level as listed below. Since the device class designator has been added after the original issuance of this drawing, device classes M and Q designators will not be included in the PIN and will not be marked on the device. Device class Device requirements documentation M Vendor self-certificat
11、ion to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICRO
12、CIRCUIT DRAWING SIZE A 5962-89441 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 3 DSCC FORM 2234 APR 97 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style C GDIP1
13、-T14 or CDIP2-T14 14 Dual-in-line 2 CQCC1-N20 20 Square leadless chip carrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. 1.3 Absolute maximum ratings. 1/ 2/ Input supply voltage (VIN) . +40 V dc Refe
14、rence output current . -10 mA Driver output currents -35 mA Status indicator voltage . +40 V dc Status indicator current . +20 mA External clock input . +40 V dc Error amplifier inputs . -0.5 V dc to +35 V dc Power dissipation (PD): At TA= +25C 1.0 W 3/ At TC= +25C . 2.0 W 4/ Junction temperature (T
15、J) . +150C Storage temperature range . -65C to +150C Lead temperature (soldering, 10 seconds) +300C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Thermal resistance, junction-to-ambient (JA): Case C 80C/W Case 2 . 70C/W 1.4 Recommended operating conditions. Ambient operating temperatu
16、re range (TA) .-55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in
17、the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. 1/
18、Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ All voltages referenced to ground. Currents are positive into, and negative out of the specified terminals. 3/ Derate at +1
19、0 mW/C above TA= +50C for case C. Derate at +9 mW/C above TA= +40C for case 2. 4/ Derate at +16 mW/C above TC= +25C. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89441 DEFENSE SUPPLY CENTER COLUMBUS COLUMB
20、US, OHIO 43218-3990 REVISION LEVEL D SHEET 4 DSCC FORM 2234 APR 97 DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or from t
21、he Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, s
22、upersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Qua
23、lity Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design,
24、 construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4
25、herein . 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Block diagram. The block diagram shall be as specified on figure 2. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrica
26、l performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full ambient operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for
27、each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of n
28、ot marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compl
29、iance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance s
30、hall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 here
31、in). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-385
32、35, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change fo
33、r device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STAND
34、ARD MICROCIRCUIT DRAWING SIZE A 5962-89441 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ 2/ -55C TA+125C unless otherwise specified Group A subgroups Device type Limit
35、s Unit Min MaxSupply Supply current ICCVIN= +35 V 1,2,3 01 8 mA Reference section Output voltage VREF1 01 1.485 1.515 V 2,3 1.470 1.530 Line regulation VRLNVIN= +4.5 V to +35 V 1,2,3 01 10 mV Load regulation VRLDIOUT= 0 mA to 5 mA 1,2,3 01 10 mV Short circuit current IOSTJ= +25C 1 01 -55 mA Error am
36、plifier section (to compensation terminal) Input offset voltage VIOVCM= +1.5 V 1,2,3 01 4 mV Input bias current IIBVCM= +1.5 V 1,2,3 01 -3 A Input offset current IIOVCM= +1.5 V 1,2,3 01 1 A Small signal open loop gain AOL4,5,6 01 40 dB Common mode rejection ratio CMRR VCM= +0.5 V to 7.5 V 4,5,6 01 6
37、0 dB Power supply rejection ratio PSRR VIN= +5 V to +25 V 4,5,6 01 80 dB Output voltage swing VO1,2,3 01 0.4 V Maximum sink current ISINK1,2,3 01 90 A Maximum source current ISRC1,2,3 01 -2 mA Modulator / drivers section (from compensation terminal) Voltage gain AV4,5,6 01 11 13 dB Output swing VO1,
38、2,3 01 1.6 V Driver sink current ISINK1,2,3 01 500 A Driver source current ISRC1,2,3 01 -15 mA See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89441 DEFENSE SUPPLY CENTER COLUMB
39、US COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Conditions 1/ 2/ -55C TA+125C unless otherwise specified Group A subgroups Device type Limits Unit Min MaxOscillator section Initial accuracy ACC 4 01 14
40、0 160 kHz 5,6 130 170 Line sensitivity VLINEVIN= +5 V dc to +35 V dc 4,5,6 01 0.35 %/V External clock low threshold VTHLCTpin = VIN1,2,3 01 0.5 V External clock high threshold VTHHCTpin = VIN1,2,3 01 1.6 V Status indicator section Input voltage window VINAt error amplifier inputs, VCM= +1.5 V dc 1,2
41、,3 01 135 165 mW Saturation voltage VSATError amplifier input = VINV VNI= 0 V, ISINK= 1.6 mA 1,2,3 01 0.45 V Maximum output current IOError amplifier input = VINV VNI= 0 V, STATUS OUTPUT pin = 3 V dc 1,2,3 01 8 mA Leakage current ILSTATUS OUTPUT pin = +40 V dc, error amplifier VINV VNI= 0.2 V 1,2,3
42、01 1 A 1/ Unless otherwise specified, VIN= +10 V dc, RT= 10 k, and CT= 820 pF. 2/ The error amplifier compensation terminal is intended as a source of feedback to the amplifiers inverting input terminal. For most applications, a series DC blocking capacitor should be part of the feedback network. Th
43、e amplifier is internally compensated for unity feedback. The waveform at the driver outputs is a square wave with an amplitude that is proportional to the error amplifier input signal. There is a fixed 12 dB of gain from the error amplifier compensation pin to the modulator driver outputs. The freq
44、uency of the output waveform is controlled by either the internal oscillator or an external clock signal. With the internal oscillator, the square wave will have a fixed 50 percent duty cycle. If the internal oscillator is disabled by connecting CTpin to VIN, then the frequency and the duty cycle of
45、 the output will be determined by the input clock waveform at the external clock pin. If the oscillator remains disabled and there is no clock at the external clock pin, there will be a linear 12 dB of signal gain to one or the other of the driver outputs depending on the dc state of the external cl
46、ock pin. The driver outputs are emitter followers which will source a minimum of 15 mA of current. The sink current, internally limited at 700 A, can be increased by adding resistors to ground at the driver outputs. Provided by IHSNot for ResaleNo reproduction or networking permitted without license
47、 from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89441 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 7 DSCC FORM 2234 APR 97 Device type 01 Case outlines C 2 Terminal number Terminal symbol 1 CTNC 2 EXTERNAL CLOCK CT3 NC NC 4 DRIVER B EXTERNAL CLOCK 5 DRIVER
48、A DRIVER B 6 NC NC 7 GROUND DRIVER A 8 RTNC 9 VREFNC 10 NON-INVERTING INPUT GROUND 11 INVERTING INPUT NC 12 COMPENSATION RT13 STATUS OUTPUT VREF14 +VINNC 15 - NON-INVERTING INPUT 16 - NC 17 - INVERTING INPUT 18 - COMPENSATION 19 - STATUS OUTPUT 20 - +VINNC = No connection FIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89441 DEFENSE SUPPLY CENTER COLU
