1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Updated boilerplate for 5 year review. - lhl 11-05-09 Charles F. Saffle REV SHET REV SHET REV STATUS REV A A A A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Kenneth Rice DLA LAND AND MARITIME COLUMBUS
2、, OHIO 43218-3990 http:/www.dscc.dla.mil STANDARD MICROCIRCUIT DRAWING CHECKED BY Kenneth Rice THIS DRAWING IS AVAILAALE FOR USE AY ALL DEPARTMENTS APPROVED BY Mike Frye MICROCIRCUIT, MEMORY, DIGITAL, CMOS, UV ERASABALE PROGRAMMABLE LOGIC DEVICE, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF
3、DEFENSE DRAWING APPROVAL DATE 92-11-17 AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-89476 SHEET 1 OF 14 DSCC FORM 2233 APR 97 5962-E310-11 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89476 DLA LA
4、ND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). T
5、he complete PIN shall be as shown in the following example: 5962-89476 01 L A _ _ _ _ _ _ _ _ Drawing number Device type Case outline Lead finish (see 1.2.1) (see 1.2.2) (see 1.2.3) 1.2.1 Device type(s). The device type(s) shall identify the circuit function as follows: Device type Generic number 1/
6、 Circuit function Propagation delay 01 16-Macrocell EPLD 35 ns 02 16-Macrocell EPLD 25 ns03 16-Macrocell EPLD 15 ns 1.2.2 Case outline(s). The case outline(s) shall be as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style L GDIP3-T24, CDIP4-T24 2
7、4 Dual-in-line package 2/ X GQCC1-J28 28 “J“ lead chip carrier 2/ 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. 3/ Supply voltage range (VCC).-2.0 V dc to +7.0 V dc Programming supply voltage range (VPP).-2.0 V dc to +13.5 V dc 4/ DC i
8、nput voltage range-2.0 V dc to +7.0 V dc 4/ Maximum power dissipation1.0 W 5/ Lead temperature (soldering, 10 seconds)+260C Thermal resistance, junction-to-case (JC): Case outlines L and X.See MIL-STD-1835 Junction temperature (TJ).+175C Storage temperature range-65C to +150C Temperature under bias
9、range-55C to +125C Endurance25 erase/write cycles (minimum) Data retention10 years (minimum) _ 1/ Generic numbers are listed on the Standard Microcircuit Drawing Source Approval Bulletin at the end of this document and will also be listed in MIL-HDBK-103. 2/ Lid shall be transparent to permit ultrav
10、iolet light erasure. 3/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 4/ Minimum dc input voltage is -0.5 V. During transitions, inputs may undershoot to -2.0 V for periods
11、 less than 20 ns. Maximum dc voltage on output pins is VCC+ 0.5 V, which may overshoot to +7.0 V for periods less than 20 ns under no load conditions. 5/ Must withstand the added PDdue to short circuit test (e.g., IOS). Provided by IHSNot for ResaleNo reproduction or networking permitted without lic
12、ense from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89476 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 3 DSCC FORM 2234 APR 97 1.4 Recommended operating conditions. Supply voltage range (VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
13、. +4.5 V dc to +5.5 V dc Ground voltage (GND) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V dc Input high voltage (VIH) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.0 V dc minimum Input low voltage (VIL) . . . . . . .
14、 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.8 V dc maximum Case operating temperature range (TC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55C to +125C 6/ Input rise time (tR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
15、. . . . . . . . . 50 ns maximum Input fall time (tF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 ns maximum 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks for
16、m a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE
17、 STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are avai
18、lable online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of thi
19、s drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class lev
20、el B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with th
21、e manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These
22、 modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as s
23、pecified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table(s). The truth table(s) shall be as specified on figure 2. _
24、 6/ Case temperatures are instant on. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89476 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 3.2.3.1 Unprogrammed
25、or erased devices. The truth table for unprogrammed devices for contracts involving no altered item drawing shall be as specified on figure 2. When required in screening (see 4.2 herein) or qualification conformance inspection, groups A, B, C, or D (see 4.3 herein), the devices shall be programmed b
26、y the manufacturer prior to test. A minimum of 50 percent of the total number of cells shall be programmed or at least 25 percent of the total number of cells to any altered item drawing. 3.2.3.2 Programmed devices. The truth table for programmed devices shall be as specified by an attached altered
27、item drawing. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall
28、 be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For
29、 packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-P
30、RF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be l
31、isted as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the require
32、ments herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DLA Land and Maritime-VA shall be required for any cha
33、nge that affects this drawing. 3.9 Verification and review. DLA Land and Maritime, DLA Land and Maritimes agent and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the optio
34、n of the reviewer. 3.10 Processing EPLDs. All testing requirements and quality assurance provisions herein shall be satisfied by the manufacturer prior to delivery. 3.10.1 Erasure of EPLDs. When specified, devices shall be erased in accordance with the procedures and characteristics specified in 4.4
35、. 3.10.2 Programmability of EPLDs. When specified, devices shall be programmed to the specified pattern using the procedures and characteristics specified in 4.5. 3.10.3 Verification of erasure or programmed EPLDs. When specified, devices shall be verified as either programmed (see 4.5 herein) to th
36、e specified pattern or erased (see 4.4 herein). As a minimum, verification shall consist of performing a functional test (subgroup 7) to verify that all bits are in the proper state. Any bit that does not verify to be in the proper state shall constitute a device failure, and shall be removed from t
37、he lot. 3.11 Endurance. A reprogrammability test shall be completed as part of the vendors reliability monitors, this reprogrammability test shall be done only for initial characterization and after any design or process changes which may affect the reprogrammability of the device. This test shall c
38、onsist of 25 program/erase cycles on 25 devices with the following conditions: a. All devices selected for testing shall be programmed in accordance with 3.2.3.1 herein. b. Verify pattern (see 3.10.3). c. Erase (see 3.10.1). d. Verify pattern erasure (see 3.10.3). Provided by IHSNot for ResaleNo rep
39、roduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89476 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC +125C 4.5 V VC
40、C 5.5 V Group A subgroupsDevice type Limits Unit unless otherwise specified Min Max Output high voltage VOHVCC= 4.5 V, VIH= 2.0 V, IOH= -4.0 mA, VIL= 0.8 V 1, 2, 3 All 2.4 V Output low voltage VOLVCC= 4.5 V, VIH= 2.0 V, IOH= 4.0 mA, VIL= 0.8 V 1, 2, 3 All 0.45 Input high voltage 1/ 2/ VIH1, 2, 3 All
41、 2.0 VCC+0.3 Input low voltage 1/ 2/ VIL1, 2, 3 All -0.3 0.8 Input leakage current IIXVCC= 5.5 V, VIN= 5.5 V and GND 1, 2, 3 All -10 10 A Output leakage current IOZVCC= 5.5 V, VOUT= 5.5 V and GND 1, 2, 3 All -10 10 Output short circuit current 2/ 3/ ISCVCC= 5.5 V, VOUT= 0.5 V 1, 2, 3 All -30 -160 mA
42、 Power supply current (turbo-on) 2/ 4/ ICC1VCC= 5.5 V, IOUT= 0 mA, VIN= VCCor GND, f = 1/tPD1, 2, 3 01 140 02, 03 300 Power supply current (turbo-off) 2/ 4/ ICC2VCC= 5.5 V, IOUT= 0 mA, VIN= VCCor GND, f = 1 MHz 1, 2, 3 01 25 02, 03 10 Power supply current (standby, nonturbo) 4/ 5/ ICC3VCC= 5.5 V, IO
43、UT= 0 mA, VIN= GND 1, 2, 3 01 900 A 02, 03 150 Input capacitance 2/ CINVCC= 5.0 V, VIN= 0.0 V, TA= +25C, f = 1 MHz (see 4.3.1c) 4 All 20 pF Output capacitance 2/ COUTVCC= 5.0 V, VOUT = 0.0 V, TA= +25C, f = 1 MHz (see 4.3.1c) 4 All 20 Clk/VPPcapacitance 2/ CVPPVCC= 5.0 V, VOUT= 0.0 V, TA= +25C, f = 1
44、 MHz (see 4.3.1c) 4 All 50 Functional tests See 4.3.1d 7, 8 All See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89476 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LE
45、VEL A SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Conditions -55C TC +125C 4.5 V VCC 5.5 V Group A subgroups Device type Limits Unit unless otherwise specified Min Max External synchronous switching characteristics Input to nonregistered outpu
46、t 6/ 10/ tPDSee figures 3 and 4 7/ CL= 30 pF 9, 10, 11 01 35 ns 02 25 03 15 Input to output enable 8/ 10/ tPZX9, 10, 11 01 35 02 25 03 18 Input to output disable 8/ 9/ 10/ tPXZSee figures 3 and 4 7/ CL= 5 pF 9, 10, 11 01 35 02 25 03 18 Asynchronous output clear time 10/ tCLRSee figures 3 and 4 7/ CL
47、= 30 pF 9, 10, 11 01 37 02 25 03 18 Input setup time 10/ tSU9, 10, 11 01 27 02 15 03 12 Clock high time 9/ tCH9, 10, 11 01 12 02 6 03 5 Clock low time 9/ tCL9, 10, 11 01 12 02 6 03 5 Clock to output delay 6/ tCO19, 10, 11 01 22 02 1003 8 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89476 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electri
