1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R043-92 91-11-25 M. L. Poelking B Changes in accordance with NOR 5962-R070-93 93-01-22 M. L. Poelking C Change to class level V. Update boilerplate. - LTG 97-07-11 T. M. Hess D Changes in accordance with NOR 59
2、62-R001-98 97-10-17 M. L. Poelking E Made Rad Hard changes in Table I. Added appendix A. - LTG 99-09-08 M. L. Poelking F Update boilerplate to MIL-PRF-38535 requirements. LTG 01-04-25 Thomas M. Hess G Added tests VOL2 and VOH2 to table I sheet 6. LTG 01-12-21 Thomas M. Hess H Correct the unit of mea
3、sure from microseconds to nanoseconds for the DMAG(L) to STDINTL(L) test on sheet 10 in Table I. - CFS 02-07-23 Thomas M. Hess J Update boilerplate to current MIL-PRF-38535 requirements. CFS 07-06-14 Thomas M. Hess K Add device type 02. Add footnote 16/ and update note 13/ in table IA. Add case outl
4、ine U for flat pack. Add die for device type 02. Add die figure C-1 in appendix A. Update title and radiation features in section 1.5 and SEP table IB. - MAA 13-06-25 Thomas M. Hess REV K K K SHEET 55 56 57 REV K K K K K K K K K K K K K K K K K K K K SHEET 35 36 37 38 39 40 41 42 43 44 45 46 47 48 4
5、9 50 51 52 53 54 REV K K K K K K K K K K K K K K K K K K K KJ SHEET 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 REV STATUS REV K K K K K K K K K K K K K K OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Christopher A. Rauch DLA LAND AND MARITIME COLUMBUS, OHIO 4
6、3218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING CHECKED BY Tim H. Noh THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY William K. Heckman MICROCIRCUIT, DIGITAL, RADIATION HARDENED, CMOS, BUS CONTROLLER, REMOTE TERMINAL AND MONITOR, MONOLITHIC SILICON AND AGE
7、NCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 90-02-08 AMSC N/A REVISION LEVEL K SIZE A CAGE CODE 67268 5962-89577 SHEET 1 OF 57 DSCC FORM 2233 APR 97 5962-E131-13Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWIN
8、G SIZE A 5962-89577 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL K SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of
9、 case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following examples. For device classes M and Q: 5962 - 89577 01
10、 X X Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2) Case outline (see 1.2.4) Lead finish (see 1.2.5) / / Drawing number For device class V: 5962 H 89577 01 V X X Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2) Device class designat
11、or Case outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535,
12、 appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 UT1553BCRTM Bus controller, remote terminal an
13、d monitor 02 UT1553BCRTMB Bus controller, remote terminal and monitor 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as listed below. Since the device class designator has been added after the original issuance of this drawing, d
14、evice classes M and Q designators will not be included in the PIN and will not be marked on the device. Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appe
15、ndix A Q or V Certification and qualification to MIL-PRF-38535 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89577 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL K SHEET 3 DSCC FORM 2234 APR
16、 97 1.2.4 Case outlines. The case outlines are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X CMGA15-P84 84 Pin grid array Y CQCC2-J84 84 Unformed-J lead chip carrier Z CQCC1-N84 84 Square leadless chip carrier U See figure 1 84 Flat pac
17、k 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. 1.3 Absolute maximum ratings. 1/ Supply voltage range (VDD) 0.3 V to +7.0 V DC input/dc output voltage range (VI/O) . -0.3 V to (VDD+0.3 V) DC input curre
18、nt (II) . 10 mA Storage temperature range -65C to +150C Lead temperature (soldering 10 seconds) . +300C Maximum power dissipation, (PD) 300 mW 2/ Maximum junction temperature (TJ) . +175C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Latchup immunity (ILU) . 150 mA Duty cycle 50 10 pe
19、rcent 1.4 Recommended operating conditions. Supply voltage (VDD) 4.5 V to 5.5 V Case operating temperature range (TC) . -55C to +125C Operating frequency (Fo) . 12 MHz .01 percent 1.5 Radiation features. (For device type 01): Maximum total dose available (dose rate = 50 300 rads(Si)/s) . 1 x 106Rads
20、(Si) Single event phenomenon (SEP): No upsets (SEU) at effective LET (see 4.4.4.4) . 27 MeV- cm2/mg 3/ No Latch up (SEL) at effective LET (see 4.4.4.4) . 80 MeV- cm2/mg 3/ Dose rate upset (20 ns pulse) 4/ Dose rate latchup 4/ Dose rate survivability . 4/ Neutron irradiated 1 x 1014neutrons/cm23/ 1.6
21、 Digital logic testing for device classes Q and V. Fault coverage measurement of manufacturing logic tests (MIL-STD-883, method 5012) 86.5 percent _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performanc
22、e and affect reliability. 2/ Must withstand the added PDdue to short circuit test (e.g., IOS). 3/ Limits are guaranteed by design or process but not production tested unless specified by the customer through the purchase order or contract. 4/ When characterized as a result of procuring activities re
23、quest, the condition will be specified. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89577 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL K SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUM
24、ENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFE
25、NSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List
26、 of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/quicksearch.dla.mil/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publicat
27、ions. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of the documents are the issues of the documents cited in the solicitation or contract. ASTM INTERNATIONAL (ASTM) ASTM F1192 - Standard Guide for the Measurement of Sin
28、gle Event Phenomena (SEP) Induced by Heavy Ion Irradiation of Semiconductor Devices. 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicab
29、le laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (Q
30、M) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.1.1 Microcircuit die. For t
31、he requirements of microcircuit die, see appendix A to this document. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device c
32、lass M. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein and figure 1. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2 3.2.3 Functional block diagram. The functional block diagram shall be as specified on figure 3. 3.2.4 Switching
33、 test circuit and waveforms. The switching test circuit and waveforms shall be as specified on figure 4. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89577 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 R
34、EVISION LEVEL K SHEET 5 DSCC FORM 2234 APR 97 3.2.5 Radiation exposure circuit. The radiation exposure circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing and acquiring activity upon request. 3.3 Electrical performance ch
35、aracteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table IA and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The el
36、ectrical test requirements shall be the subgroups specified in table IIA. The electrical tests for each subgroup are defined in table IA. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the
37、entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking
38、 for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535,
39、appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from
40、a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device
41、 classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535,
42、 appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DLA Land and Maritime-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any cha
43、nge that affects this drawing. 3.9 Verification and review for device class M. For device class M, DLA Land and Maritime-VA , DLA Land and Maritime s agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation
44、 shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 105 (see MIL-PRF-38535, appendix A). Provided by IHSNot for ResaleNo reproduction or networking
45、permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89577 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL K SHEET 6 DSCC FORM 2234 APR 97 TABLE IA. Electrical performance characteristics. Test Symbol Conditions 1/ 4.5 V VDD 5.5 V -55C TC+125C unless otherw
46、ise specified Group A subgroups Device type Limits Unit Min Max Low level input voltage TTL inputs VIL1, 2, 3 All 0.8 V High level input voltage TTL inputs 2/ VIH1, 2, 3 01 2.0 V 02 2.2 Input leakage current TTL inputs IINVIN= VDDor VSS1, 2, 3 All -1 1 A M, D, P, L, R, F, G, H 1 01 -10 10 With pull-
47、up resistors VIN= VDD1, 2, 3 01 -1 1 02 -10 10 M, D, P, L, R, F, G, H 1 01 -10 10 With pull-up resistors VIN= VSS1, 2, 3 01 -550 -80 02 -900 -150 M, D, P,L, R, F, G, H 1 01 -900 -150 Low level output voltage TTL outputs VOLIOL= 3.2 mA 1, 2, 3 All 0.4 V Low level output voltage CMOS outputs VOL2IOL=
48、50 A 1, 2, 3 All VSS+0.1 V High level output voltage TTL outputs 16/ VOHIOH= -400 A 1, 2, 3 All 2.4 V High level output voltage CMOS outputs 16/ VOH2IOH= -50 A 1, 2, 3 All VDD-0.1 V Three-state output leakage Current TTL outputs IOZVOUT= VDDor VSS1, 2, 3 All -10 10 A Short-circuit output current 3/ 4/ IOSVDD= 5.5 V, VOUT= VDD1, 2, 3 All 110 mA VDD= 5.5 V, VOUT= 0 V 1, 2, 3 All -110 mA Quiescent current 5/ 6/ QIDD1, 3 All 35 A 2 1 mA Average operating current 3/ 7/ IDDf = 12 MHz, CL= 50 pF 1, 2, 3 All 50 mA Input capacitance CINSee 4.4.1b 4 All 10 pF Output capacitance COUT4
