DLA SMD-5962-89663 REV A-2010 MICROCIRCUIT DIGITAL BIPOLAR ADVANCED SCHOTTKY TTL 9 BIT PARITY GENERATORS CHECKER WITH BUS DRIVER PARITY I O PORT MONOLITHIC SILICON.pdf

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1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Update drawing to current requirements. Editorial changes throughout. - gap 10-02-04 Charles F. Saffle The original first sheet of this drawing has been replaced. REV SHET REV SHET REV STATUS REV A A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5

2、6 7 8 9 10 11 12 PMIC N/A PREPARED BY Tim H. Noh DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE CHECKED BY Ray Monnin APPROVED BY Michael A. F

3、rye MICROCIRCUIT, DIGITAL, BIPOLAR, ADVANCED SCHOTTKY TTL, 9 BIT PARITY GENERATORS/ CHECKER WITH BUS DRIVER PARITY I/O PORT, MONOLITHIC SILICON DRAWING APPROVAL DATE 89-05-11 AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-89663 SHEET 1 OF 12 DSCC FORM 2233 APR 97 5962-E486-09 Provided by IHSN

4、ot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89663 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for

5、 MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-89663 01 C X Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.

6、3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54AS286 9-bit parity generators/checker with bus driver parity I/O port 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Out

7、line letter Descriptive designator Terminals Package style C GDIP1-T14 or CDIP2-T14 14 Dual-in-line package D GDFP1-F14 or CDFP2-F14 14 Flat pack package 2 CQCC1-N20 20 Square leadless chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum

8、ratings. Supply voltage range -0.5 V dc minimum to +7.0 V dc maximum Input voltage range . -1.2 V dc at -18 mA to +7.0 V dc Voltage applied to a disabled 3-state output . +5.5 V dc Maximum power dissipation (PD) 1/ +275 mW Storage temperature range . -65C to +150C Lead temperature (soldering, 10 sec

9、onds) +300C Junction temperature (TJ) +175C Thermal resistance, junction-to-case (JC) See MIL-STD-1835 1.4 Recommended operating conditions. Supply voltage range (VCC) . +4.5 V dc minimum to +5.5 V dc maximum Minimum high level input voltage (VIH) +2.0 V dc Maximum low level input voltage (VIL) . +0

10、8 V dc Case operating temperature range (TC) -55C to +125C _ 1/ Maximum power dissipation is defined as VCCx ICC, and must withstand added PDdue to short circuit test; IO. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING

11、 SIZE A 5962-89663 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent s

12、pecified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Sta

13、ndard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.m

14、il/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in

15、this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. P

16、roduct built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan a

17、nd qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN

18、 as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A a

19、nd herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Test circuit and switching waveforms. The te

20、st circuit and switching waveforms shall be as specified on figure 3. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical t

21、est requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 596

22、2-89663 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marke

23、d. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to

24、 MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order t

25、o be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herei

26、n. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawin

27、g. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 4. VERIFICATION 4.1 Sampling and inspectio

28、n. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply:

29、a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, ou

30、tputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are

31、 optional at the discretion of the manufacturer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89663 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 5 DSCC FORM 2234 APR 97 T

32、ABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC +125C unless otherwise specified Group A subgroups Limits Unit Min Max High level output voltage VOHVCC= 4.5 V, IOH= -2.0 mA, All outputs 1, 2, 3 2.5 V VIL= 0.8 V, VIH= 2.0 V VCC= 4.5 V, VIL= 0.8 V, VIH= 2.0 V IOH= -3.0 m

33、A Parity I/O 2.4 IOH= -12 mA 2.4 Low level output voltage VOLVCC= 4.5 V, IOL= 20 mA Parity error 1, 2, 3 0.5 V VIL= 0.8 V, VIH= 2.0 V IOL= 32 mA Parity I/O 0.5 Input clamp voltage VICVCC= 4.5 V, IIN= -18 mA 1, 2, 3 -1.2 V High level input current IIH1VCC= 5.5 V, Parity I/O 1, 2, 3 50 A VIN= 2.7 V 1/

34、 Other inputs20IIH2VCC= 5.5 V VIN= 5.5 V Parity I/O 1, 2, 3 0.1 mA IN= 7.0 V Other inputs 0.1 Low level input current IILVCC= 5.5 V, Parity I/O 1, 2, 3 -0.5 mA VIN= 0.4 V 1/ Other inputs -0.5 Output current IOVCC= 5.5 V, VOUT= 2.25 V 2/ 1, 2, 3 -30 -112 mA Supply current ICCVCC= 5.5 V Transmit 1, 2,

35、 3 43 mA Receive 50 Functional tests See 4.3.1c 7, 8 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89663 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVE

36、L A SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions -55C TC +125C unless otherwise specified Group A subgroups Limits Unit Min Max Propagation delay time, any A thru I to Parity I/O tPLH1 VCC= 4.5 to 5.5 V, CL= 50 pF, R1= 500 , R2= 50

37、0 , See figure 3 9, 10, 11 3 17 ns tPHL115Propagation delay time, any A thru I to Parity Error tPLH29, 10, 11 3 20 ns tPHL2 18Propagation delay time, Parity I/O to Parity Error tPLH3 9, 10, 11 3 10 ns tPHL3 10Output enable time, XMIT to Parity I/O tPZH 9, 10, 11 3 14 ns tPZL 17Output disable time XM

38、IT to Parity I/O tPHZ 9, 10, 11 3 13 ns tPLZ 111/ For I/O ports, the parameters IIH1and IILinclude the off-state current. 2/ The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS. Provided by IHSNot for ResaleNo r

39、eproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89663 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 7 DSCC FORM 2234 APR 97 Device type 01 Case outlines C and D 2 Terminal number Terminal symbols 1 G NC 2 H

40、G 3 XMIT H 4 I XMIT 5 PE NC 6 I/O I 7 GND NC 8 A PE 9 B I/O 10 C GND 11 D NC 12 E A 13 F B 14 VCCC 15 NC 16 D 17 NC 18 E 19 F 20 VCCFIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5

41、962-89663 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 8 DSCC FORM 2234 APR 97 Number of inputs (A through I) that are high XMIT Parity I/O Parity Error 0, 2, 4, 6, 8 l H H 1, 3, 5, 7, 9 l L H 0, 2, 4, 6, 8 h h H 0, 2, 4, 6, 8 h l L 1, 3, 5, 7, 9 h h L 1, 3, 5, 7,

42、9 h l H h = high input level l = low input level H = high output level L = low output level FIGURE 2. Truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89663 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS

43、 OHIO 43218-3990 REVISION LEVEL A SHEET 9 DSCC FORM 2234 APR 97 PROPAGATION DELAY TIMES FIGURE 3. Test circuit and switching waveforms. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89663 DEFENSE SUPPLY CE

44、NTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 10 DSCC FORM 2234 APR 97 NOTES: 1. CLincludes probe and jig capacitance. 2. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control Waveform 2 is for an output with inte

45、rnal conditions such that the output is high except when disabled by the output control. 3. All input pulses have the following characteristics: PRR = 10 MHz, tr= tf= 3 ns 1 ns, duty cycle = 50%. 4. When measuring propagation delay times of three-state outputs, switch S1 is open. 5. The outputs are

46、measured one at a time with one input transition per measurement. FIGURE 3. Test circuit and switching waveforms - Continued. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89663 DEFENSE SUPPLY CENTER COLUMB

47、US COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 11 DSCC FORM 2234 APR 97 TABLE II. Electrical test requirements. MIL-STD-883 test requirements Subgroups (in accordance with MIL-STD-883, method 5005, table I) Interim electrical parameters (method 5004) - - - - Final electrical test parameters (me

48、thod 5004) 1*, 2, 3, 7, 8, 9, 10, 11 Group A test requirements (method 5005) 1, 2, 3, 7, 8, 9, 10, 11 Groups C and D end-point electrical parameters (method 5005) 1, 2, 3 * PDA applies to subgroup 1. 4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with method 5005 of MIL-STD-883 including groups A, B, C, and D inspections. The following additional criteria shall apply. 4.3.1 Group A inspection. a. Tests shall be as specified in table II herein. b

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