DLA SMD-5962-89687 REV D-2012 MICROCIRCUIT DIGITAL BIPOLAR ADVANCED LOW-POWER SCHOTTKY TTL OCTAL BUS TRANSCEIVERS AND REGISTERS WITH INVERTING THREE-STATE AND OPEN-COLLECTOR OUTPUT.pdf

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1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Made technical changes in table1. Editorial changes throughout document. 90-12-05 W. Heckman B Changes IAW NOR 5962-R205-92. -tvn 92-05-11 Tim H. Noh C Update to reflect latest changes in format and requirements. Editorial changes throughout. -le

2、s 04-08-10 Raymond Monnin D Update drawing as part of 5 year review. 12-02-28 C. SAFFLE THE ORIGINAL FIRST PAGE OF THIS DRAWING HAS BEEN REPLACED. REV SHEET REV SHEET REV STATUS REV D D D D D D D D D D D D OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY Larry T. Gauder DLA LAND AND M

3、ARITIME COLUMBUS, OHIO 43218-3990 http:/www.Landand maritime.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE CHECKED BY William K. Heckman APPROVED BY William K. Heckman MICROCIRCUIT, DIGITAL, BIPOLAR, ADVANCED LOW-

4、POWER SCHOTTKY, TTL, OCTAL BUS TRANSCEIVERS AND REGISTERS, WITH INVERTING THREE-STATE AND OPEN-COLLECTOR OUTPUTS, MONOLITHIC SILICON DRAWING APPROVAL DATE 90-03-20 AMSC N/A REVISION LEVEL D SIZE A CAGE CODE 67268 5962-89687 SHEET 1 OF 12 DSCC FORM 2233 APR 97 5962-E202-12 Provided by IHSNot for Resa

5、leNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89687 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 complia

6、nt, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-89687 01 L A Drawing number Device type (see 1.2.1) Case outline (see 1.2.2) Lead finish (see 1.2.3) 1.2.1 Device ty

7、pe. The device type identify the circuit function as follows: Device type Generic number Circuit function 01 54ALS653 Octal bus transceivers and registers with inverting three-state and open-collector outputs 1.2.2 Case outlines. The case outlines are as designated in MIL-STD-1835 and as follows: Ou

8、tline letter Descriptive designator Terminals Package style L GDIP3-T24 or CDIP4-T24 24 dual-in-line K GDFP2-F24 or CDFP3-F24 24 flat 3 CQCC1-N28 28 square chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage range

9、 (VCC) -0.5 V dc to +7.0 V dc DC input voltage: All inputs and A I/O ports . -1.2 V dc at 18 mA to +7.0 V dc B I/O ports -1.2 V dc at 18 mA to +5.5 V dc Storage temperature range -65C to +150C Maximum power dissipation (PD) . 484 mW 1/ Lead temperature (soldering, 10 seconds) +300C Junction temperat

10、ure (TJ) +175C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 1.4 Recommended operating conditions. Supply voltage range (VCC) +4.5 V dc to +5.5 V dc Minimum high level input voltage (VIH) . 2.0 V dc Maximum low level input voltage (VIL): TC= +125C . 0.7 V dc TC= -55C 0.8 V dc TC= +25C

11、 . 0.8 V dc Maximum high level output voltage (VOH) A ports . 5.5 V dc Maximum high level output current (IOH) B ports . -12 mA Maximum low level output current (IOL) +12 mA Case operating temperature range (TC) . -55C to +125C _ 1/ Maximum power dissipation is defined as VCCX ICC, and must withstan

12、d the added PDdue to short circuit output test e.g., IO. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89687 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 3 DSCC FORM 2234 APR 97 1.

13、4 Recommended operating conditions - Continued. Minimum setup time, before CAB or before CBA (ts) 2/ 15.0 ns Minimum hold time, after CAB or after CBA (th) 2/ . 5.0 ns Minimum pulse duration (tw): CBA or CAB high 25.0 ns CBA or CAB low . 25.0 ns Maximum clock frequency (fclock): A output 12.5 MHz B

14、output 25 MHz 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitatio

15、n or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFE

16、NSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphi

17、a, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtai

18、ned. _ 2/ Transition of clock from low to high. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89687 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREM

19、ENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer

20、or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM)

21、plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML

22、 flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The t

23、erminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Test circuit and switching waveforms. The test circuit and switching waveforms shall be as specified on figure 3. 3.3 Electrical performance characteristics. Unless othe

24、rwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for eac

25、h subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible

26、due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced

27、with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein

28、). The certificate of compliance submitted to DLA Land and Maritime -VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of confo

29、rmance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DLA Land and Maritime -VA shall be required for any change that affects this drawing. 3.9 Verification and review. DLA Lan

30、d and Maritime, DLA Land and Maritime s agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction o

31、r networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89687 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC +125C 1/ unless otherwise

32、 specified Group A subgroups Device type Limits Unit Min Max High level output voltage B ports 2/ VOHVCC= 4.5 V, VIH= 2.0 V, VIL= 0.8 V IOH = -0.4 mA IOH = -3.0 mA IOH = -12 mA 1, 3 All 2.5 2.4 2.0 V VCC= 4.5 V, VIH= 2.0 V, VIL= 0.7 V IOH = -0.4 mA IOH = -3.0 mA IOH = -12 mA 2 All 2.5 2.4 2.0 V Low

33、level output voltage VOLVCC= 4.5 V, VIH= 2.0 V, 2/ VIL= 0.8 V 1, 3 All 0.4 V IOL= 12 mA VIL= 0.7 V 2 All 0.4 V Input clamp voltage VICVCC= 4.5 V, IIN= -18 mA 1, 2, 3 All -1.2 V High level input current IIH1VCC= 5.5 V VIN= 7.0 V Control inputs 1, 2, 3 All 0.1 mA 3/ VIN= 5.5 V A or B ports 0.1 IIH2VIN

34、= 2.7 V Control inputs 1, 2, 3 All 20 A VIN= 2.7 V A or B ports 20 Low level input current IILVIN= 0.4 V Control inputs 1, 2, 3 All -0.2 mA VIN= 0.4 V A or B ports -0.2 High level output current IOHVCC= 4.5 V, VOH= 5.5 V A port 1, 2, 3 All 0.1 mA Output current IOVCC= 5.5 V, 4/ VOUT= 2.25 V B port 1

35、, 2, 3 All -20 -112 mA Supply current ICCHVCC= 5.5 V Outputs high 1, 2, 3 All 76 mA ICCLOutputs low 88 ICCZOutputs disabled 88 Functional tests See 4.3.1c 5/ 7, 8 All Maximum frequency fMAXVCC= 4.5 V to 5.5 V R1= R2= 500, 6/ A output 9, 10, 11 All 12.5 MHz CL= 50 pF, See figure 3 B output 25 See foo

36、tnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89687 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance cha

37、racteristics - Continued. Test Symbol Conditions -55C TC +125C 1/ unless otherwise specified Group A subgroups Device type Limits Unit Min Max Propagation delay time, CBA to A tPLH1VCC= 4.5 V to 5.5 V 9, 10, 11 All 16 71 ns tPHL1 R1= R2= 500 9, 10, 11 All 6 24 ns Propagation delay time, CAB to B tPL

38、H2 CL= 50 pF see figure 3 6/ 9, 10, 11 All 10 35 ns tPHL2 9, 10, 11 All 5 20 ns Propagation delay time, A to B tPLH3 9, 10, 11 All 5 20 ns tPHL3 9, 10, 11 All 1.5 18 ns Propagation delay time, B to A tPLH4 9, 10, 11 All 8 63 ns tPHL4 9, 10, 11 All 2 18 ns Propagation delay time, SBA to A (with B low

39、) tPLH5 9, 10, 11 All 12 68 ns 7/ tPHL5 9, 10, 11 All 5 27 ns Propagation delay time, SBA to A (with B high) tPLH6 9, 10, 11 All 19 68 ns 7/ tPHL6 9, 10, 11 All 5 27 ns Propagation delay time, SAB to B (with A high) tPLH7 9, 10, 11 All 12 40 ns 7/ tPHL7 9, 10, 11 All 6 25 ns See footnotes at end of

40、table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89687 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Co

41、ntinued. Test Symbol Conditions -55C TC +125C 1/ unless otherwise specified Group A subgroups Device type Limits Unit Min Max Propagation delay time, SAB to B (with A low) tPLH8VCC= 4.5 V to 5.5 V 9, 10, 11 All 8 30 ns 7/ tPHL8 RL= 500 9, 10, 11 All 6 25 ns Propagation delay time, GBA to A tPLH9 CL=

42、 50 pF see figure 3 6/ 9, 10, 11 All 6 35 ns tPHL9 9, 10, 11 All 6 27 ns Output enable time, GAB to B tPZH1 9, 10, 11 All 7 25 ns tPZL1 9, 10, 11 All 6 25 ns Output disable time, GAB to B tPHZ1 9, 10, 11 All 1 16 ns tPLZ1 9, 10, 11 All 2 21 ns 1/ Unused inputs that do not directly control the pin un

43、der test must be put at 2.5 V or 0.4 V. No unused inputs shall exceed 5.5 V or go less than 0.0 V. No inputs shall be floated. 2/ All outputs must be tested. In the case where only one input at VILmaximum or VIHminimum produces the proper output state, the test must be performed with each input bein

44、g selected as the VILmaximum or VIHminimum input. 3/ For I/O ports, the parameters IIH2and IILinclude the off-state output current. 4/ The output conditions have been chosen to produce a current that closely approximates one-half of the true short circuit output current, IOS. Not more than one outpu

45、t will be tested at one time and the duration of the test condition shall not exceed one second. 5/ Functional tests shall be conducted at input test conditions of GND VIL VOLand VOH VIH VCC. 6/ Propagation delay limits are based on single output switching. Unused inputs = 3.5 V or 0.3 V. 7/ These i

46、nput parameters are measured with the internal output state of the storage register opposite to that of the bus input. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89687 DLA LAND AND MARITIME COLUMBUS, OHI

47、O 43218-3990 REVISION LEVEL D SHEET 8 DSCC FORM 2234 APR 97 Device type 01 Case outlines K and L 3 Terminal number Terminal symbol 1 CAB NC 2 SAB CAB 3 GAB SAB 4 A1 GAB 5 A2 A1 6 A3 A2 7 A4 A3 8 A5 NC 9 A6 A4 10 A7 A5 11 A8 A6 12 GND A7 13 B8 A8 14 B7 GND 15 B6 NC 16 B5 B8 17 B4 B7 18 B3 B6 19 B2 B5

48、 20 B1 B4 21 GBA B3 22 SBA NC 23 CBA B2 24 VCCB1 25 - - - GBA 26 - - - SBA 27 - - - CBA 28 - - - VCCNC = No connection FIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89687 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 9 DSCC FORM 2234 APR 97 Inputs Data I/O Operation or function GAB GBA CAB CBA SAB SBA

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