1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with the notice of revision 5962R-135-93 93-04-13 Monica L. Poelking B Redraw switching waveforms in figure 4, switching waveforms and test circuit. Update the boilerplate to current requirements as specified in MIL-PRF-3853
2、5. Editorial changes throughout. jak 06-12-04 Thomas M. Hess C Update boilerplate paragraphs to the current MIL-PRF-38535 requirements. - LTG 13-03-25 Thomas M. Hess REV SHEET REV SHEET REV STATUS REV OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 PMIC N/A PREPARED BY Tim H. Noh DLA LAND AND MARITIME COLUM
3、BUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A CHECKED BY William J. Johnson APPROVED BY William K. Heckman MICROCIRCUIT, DIGITAL, HIGH-SPEED CMOS, 8-BIT SERI
4、AL-IN/PARALLEL-OUT SHIFT REGISTER, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON DRAWING APPROVAL DATE 89-08-03 REVISION LEVEL C SIZE A CAGE CODE 67268 5962-89704 SHEET 1 OF 11 DSCC FORM 2233 APR 97 5962-E300-13 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IH
5、S-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89704 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PR
6、F-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-89704 01 C A Drawing number Device type (see 1.2.1) Case outline (see 1.2.2) Lead finish (see 1.2.3) 1.2.1 Device type(s). The device type(s) identify the circuit function as follow
7、s: Device type Generic number Circuit function 01 54HCT164 8-bit serial-in/parallel-out shift register, TTL compatible inputs 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style C GDIP1-T14 or CDIP
8、2-T14 14 Dual-in-line 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range (VCC) . -0.5 V dc to +7.0 V dc DC input voltage range (VIN) . -0.5 V dc to VCC + 0.5 V dc DC output voltage range (VOUT) -0.5 V dc to VCC
9、+ 0.5 V dc Clamp diode current (IIK, IOK) 20 mA DC output current (per pin) (IOUT) 25 mA DC VCCor GND current (per pin) (ICC, IGND) 50 mA Storage temperature range (TSTG) -65C to +150C Maximum power dissipation (PD) 500 mW 4/ Lead temperature (soldering, 10 seconds) . +260C Thermal resistance, junct
10、ion-to-case (JC) See MIL-STD-1835 Junction temperature (TJ) . +175C 1.4 Recommended operating conditions. Supply voltage range (VCC) . +4.5 V dc to +5.5 V dc Case operating temperature range (TC) -55C to +125C Input rise or fall time (tr, tf) 0 to 500 ns _ 1/ Stresses above the absolute maximum rati
11、ng may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Unless otherwise specified, all voltages are referenced to ground. 3/ The limits for the parameters specified herein shall apply over the full specified VCCrange a
12、nd case temperature range of -55C to +125C. 4/ For TC= +100C to +125C, derate linearly at 12 mW/C. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89704 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISIO
13、N LEVEL C SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are thos
14、e cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Ou
15、tlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Bui
16、lding 4D, Philadelphia, PA 19111-5094). 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents cited in the solicitation or contract. JEDEC SOLID STATE TECHNOLOGY ASSOCIATION (J
17、EDEC) JESD7 - Standard for Description of 54/74HCXXXXX and 54/74HCTXXXXX Advanced High-Speed CMOS Devices. (Copies of these documents are available online at http:/www.jedec.org or from JEDEC Solid State Technology Association, 3103 North 10thStreet, Suite 240-S Arlington, VA 22201-2107). 2.3 Order
18、of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item
19、 requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufact
20、urer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make
21、 modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option
22、is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal conne
23、ctions shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figu
24、re 4. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89704 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 4 DSCC FORM 2234 APR 97 3.3 Electrical performance characteristics. Unless ot
25、herwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for e
26、ach subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasibl
27、e due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replace
28、d with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 here
29、in). The certificate of compliance submitted to DLA Land and Maritime -VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of con
30、formance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DLA Land and Maritime -VA shall be required for any change that affects this drawing. 3.9 Verification and review. DLA L
31、and and Maritime, DLA Land and Maritimes agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction
32、or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89704 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Test conditions 1/ -55C TC +125C unless oth
33、erwise specified VCCGroup A subgroups Limits Unit Min Max High level output voltage VOHVIN= VIH= 2.0 V or VIL= 0.8 V IOH= -20 A 4.5 V 1, 2, 3 4.4 V IOH= -4 mA 3.7 Low level output voltage VOLVIN= VIH= 2.0 V or VIL= 0.8 V IOL= +20 A 4.5 V 1, 2, 3 0.1 V IOL= +4 mA 0.4 High level input voltage VIH2/ 4.
34、5 V 1, 2, 3 2.0 V Low level input voltage VIL2/ 4.5 V 1, 2, 3 0.8 V Input capacitance CINVIN= 0 V, see 4.3.1c, TC= +25C 4 10 pF Output capacitance COUTSee 4.3.1c, TC= +25C 4 20 pF Quiescent supply current ICCVIN= VCCor GND 5.5 V 1, 2, 3 160 A Input leakage current IINVIN= VCCor GND 5.5 V 1, 2, 3 1.0
35、 A Additional quiescent supply current, TTL input levels ICCAny one input, VIN = 2.4 V, Other inputs, VIN= VCCor GND IOUT= 0.0 A 5.5 V 1, 2, 3 1.6 mA Functional tests See 4.3.1d 7, 8 Propagation delay time, CP to Qn tPHL1, tPLH1CL= 50 pF See figure 4 4.5 V 9 36 ns 10, 11 54 Propagation delay time, M
36、R to Qn tPHL2, tPLH24.5 V 9 38 ns 10, 11 57 Transition time tTHL, tTLH3/ 4.5 V 9 15 ns 10, 11 22 Maximum clock frequency fMAX4.5 V 9 27 MHz 10, 11 18 Pulse width, MR and CP tw4.5 V 9 18 ns 10, 11 27 Setup time, data to CP ts4.5 V 9 12 ns 10, 11 18 Hold time, data from CP th4.5 V 9 4 ns 10, 11 4 Remo
37、val time, MR to CP tREM4.5 V 9 16 ns 10, 11 24 1/ For power supply of 5 V 10 percent, the worst case output voltages (VOHand VOL) occur for HCT at 4.5 V. Thus, the 4.5 V values should be used when designing with this supply. Worst cases VIHand VILoccur at VCC= 5.5 V and 4.5 V, respectively. 2/ VIHan
38、d VILtests are not required if applied as forcing functions for VOHor VOLtests. 3/ Transition times (tTLH, tTHL), if not tested, shall be guaranteed to the specified limits in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIR
39、CUIT DRAWING SIZE A 5962-89704 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 6 DSCC FORM 2234 APR 97 Device type 01 Case outline C Terminal number Terminal symbol 1 2 3 4 5 6 7 8 9 10 11 12 13 14 DS1 DS2 Q0 Q1 Q2 Q3 GND CP MR Q4 Q5 Q6 Q7 VCCFIGURE 1. Terminal connections. Op
40、erating mode Inputs Outputs MR CP DS1 DS2 Q0 Q1 Q7 Reset (clear) L X X X L L L Shift H l l L q0 q6 H l h L q0 q6 H h l L q0 q6 H h h H q0 q6 L = Low voltage level H = High voltage level X = Irrelevant l = Low voltage level one setup time prior to the low-to-high clock transition h = High voltage lev
41、el one setup time prior to the low-to-high clock transition = Low-to-high clock transition. q = The state of the reference input (or output) one setup time prior to the low-to-high clock transition FIGURE 2. Truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without li
42、cense from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89704 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 7 DSCC FORM 2234 APR 97 FIGURE 3. Logic diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROC
43、IRCUIT DRAWING SIZE A 5962-89704 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 8 DSCC FORM 2234 APR 97 FIGURE 4. Switching waveforms and test circuit. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAW
44、ING SIZE A 5962-89704 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 9 DSCC FORM 2234 APR 97 NOTES: 1. CL= 50 pF or equivalent (includes test jig and probe capacitance). 2. Input signal from pulse generator: VIN= 0.0 V to 3.0 V; PRR 1 MHz; ZO= 50; tr= 6.0 ns; tf= 6.0 ns; tran
45、d tfshall be measured from 0.3 V to 2.7 V and from 2.7 V to 0.3 V, respectively; duty cycle = 50 percent. 3. The outputs are measured one at a time with one transition per measurement. FIGURE 4. Switching waveforms and test circuit Continued. Provided by IHSNot for ResaleNo reproduction or networkin
46、g permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89704 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 10 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF
47、-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C,
48、or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except inter
