1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Added device types 03 and 04, added vendor CAGE code 65896 as vendor for device type 01. Modified figure 3 waveforms. Editorial changes throughout. 92-08-04 Monica L. Poelking B Update boilerplate to current MIL-PRF-38535 requirements. - CFS 06-0
2、2-27 Thomas M. Hess REV SHET REV SHET REV STATUS REV B B B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Christopher A. Rauch DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Tim H. Noh COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.
3、mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Don Cool MICROCIRCUIT, DIGITAL, CMOS 64-BIT AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 07 November 1989 OUTPUT CORRELATOR, MONOLITHIC SILICON AMSC N/A REVISION LEVEL SIZE A CAGE CODE 67268 5962-89711 B SHEET 1
4、OF 14 DSCC FORM 2233 APR 97 5962-E130-06 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89711 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE
5、1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-89711 01 J X Drawing number Device type
6、 (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function Correlation Rate 01 TMC2023V, L10C23 CMOS digital output correlator, 64-bit 25 MHz 02 TMC2023V1 CMOS digital outpu
7、t correlator, 64-bit 30 MHz 03 TMC2023V2 CMOS digital output correlator, 64-bit 35 MHz 04 TMC2023V3 CMOS digital output correlator, 64-bit 50 MHz 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style
8、 J GDIP1-T24 or CDIP2-T24 24 Dual-in-line L GDIP3-T24 or CDIP4-T24 24 Dual-in-line 3 CQCC1-N28 28 Square leadless chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage range. -0.5 V dc to +7.0 V dc Input voltage ran
9、ge . -0.5 V dc to VDD+0.5 V dc Applied output voltage range 1/ -0.5 V dc to VDD+0.5 V dc Forced output current range 2/. -3.0 mA to +6.0 mA Output short circuit duration 3/ . 1.0 second Power dissipation, unloaded (PD): 4/ Device type 01 . 305 mW Device type 02 . 415 mW Device type 03 . 415 mW Devic
10、e type 04 . 550 mW Lead temperature (soldering, 10 seconds) +300C Thermal resistance, junction-to-case (JC): Case outlines J, L, and 3 See MIL-STD-1835 Maximum junction temperature (TJ) +175C _ 1/ Applied voltage must be current-limited to specified range and measured with respect to ground. 2/ Forc
11、ing voltage must be limited to specified range. 3/ Applies to single output in high state to ground. 4/ Must withstand the added PDdue to short circuit test; e.g., IOS. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZ
12、E A 5962-89711 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 1.4 Recommended operating conditions. Supply voltage range (VDD) . 4.5 V dc to 5.5 V dc Clock pulse width, low, clocks, LDR (tPWL): Device type 01 . 15 ns minimum Device type 02 . 1
13、4 ns minimum Device type 03 . 14 ns minimum Device type 04 . 10 ns minimum Clock pulse width, high, clocks, LDR (tPWH): Device type 01 . 15 ns minimum Device type 02 . 14 ns minimum Device type 03 . 14 ns minimum Device type 04 . 8 ns minimum Data input setup time, correlator, IO0-6(tSCOR): Device t
14、ype 01 . 14 ns minimum Device type 02 . 10 ns minimum Device type 03 . 10 ns minimum Device type 04 . 10 ns minimum Data input setup time, shift register, AIN, BIN, MIN(tSSR): Device type 01 . 13 ns minimum Device type 02 . 10 ns minimum Device type 03 . 10 ns minimum Device type 04 . 9 ns minimum D
15、ata input hold time, AIN, BIN, MIN, IO0-6(th) 0 ns minimum Input low voltage (VIL) 0.8 V dc maximum Input high voltage (VIH) 2.0 V dc minimum Input high voltage, A, B, M, S Clks (VIHC) 2.4 V dc minimum Output low current (IOL) . 4.0 mA maximum Output high current (IOH) . -2.0 mA minimum Case operati
16、ng temperature range (TC) -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are thos
17、e cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Ou
18、tlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Or
19、der Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and
20、regulations unless a specific exemption has been obtained. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89711 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 223
21、4 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qua
22、lified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Qual
23、ity Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to i
24、dentify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Termina
25、l connections. The terminal connections shall be as specified on figure 1. 3.2.3 Block diagram. The block diagram shall be as specified on figure 2. 3.2.4 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 3. 3.3 Electrical performance char
26、acteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The
27、electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN
28、 number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicato
29、r “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-
30、HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of
31、 conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent,
32、and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS
33、-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89711 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ -55C TC +125C 4.5 V dc VDD 5.5 V dc unless otherwise specified Group
34、 A subgroupsDevice type Limits Unit Min Max Quiescent supply current IDDQVDD= 5.5 V, VIN= 0 V, TS = 5.0 V All 10 mA f = 25 MHz 01 55 f = 30 MHz 2/ 02 75 f = 35 MHz 2/ 03 75 Dynamic supply current IDDVDD= 5.5 V,TS = 5.0 V f = 50 MHz 2/ 04 100 mA Input low current IILVDD= 5.5 V, VIN= 0 V -20 A Input h
35、igh current IIHVDD= 5.5 V, VIN= VDD+20 A Output low voltage VOLIOL= 4.0 mA 0.4 V Output high voltage VOHVDD= 4.5 V,VIN= 0.8 V, 2.0 V IOH= -2.0 mA 2.4 V Three-state output leakage current, output low 3/ IOZLVDD= 5.5 V, VIN= 0 V -40 A Three-state output leakage current, output high 3/ IOZHVDD= 5.5 V,
36、VIN= 5.5 V +40 A Output short-circuit current 2/ 4/ IOSVDD= 5.5 V, output high, one pin to ground, t = 1.0 sec maximum 1, 2, 3 -125 mA Input capacitance CIN4 10 pF Output capacitance COUTTA= 25C, f = 1.0 MHz, See 4.3.1c 4 10 pFFunctional tests VDD= 5.0 V, See 4.3.1d 7, 8 All 01 25 02 30 03 35 Clk fr
37、equency, correlator, shift register and flag 5/ 6/ FCLKVDD= 4.5 V, See figure 3 7, 8 04 50 MHz See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89711 DEFENSE SUPPLY CENTER COLUMB
38、US COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions 1/ -55C TC +125C 4.5 V dc VDD 5.5 V dc unless otherwise specified Group A subgroupsDevice type Limits Unit Min Max 01 4 2/ 25 02 4 2/ 20 03
39、4 2/ 20 Digital output delay, correlator 5/ tDCOR04 4 2/ 18 ns 01 4 2/ 25 02 4 2/ 22 03 4 2/ 22 Digital output delay, shift register 5/ tDSR04 4 2/ 20 ns 01 4 2/ 22 02 4 2/ 19 03 4 2/ 19 Digital output delay, flag 5/ tDF04 4 2/ 17 ns 01 25 02 20 03 20 Three-state output enable delay tENA04 18 ns 01
40、24 02 18 03 18 Three-state output disable delay tDISVDD= 4.5 V, See figure 3 9, 10, 11 04 16 ns 1/ All testing will be performed under worst-case conditions unless otherwise specified. 2/ If not tested, shall be guaranteed to the limits specified in table I. 3/ Due to the IO0-6and T register interco
41、nnections, these values are the IIHand IILof the T register outputs. 4/ Not more than one output should be shorted at a time. Maximum duration of one second. 5/ All transitions are measured at a 1.5 V level. Inputs are driven at VIL= 0 V and VIH= 3.0 V during dynamic testing. 6/ Not directly tested,
42、 but verified during functional tests by operating the device at the specified frequency. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89711 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISIO
43、N LEVEL B SHEET 7 DSCC FORM 2234 APR 97 Device types: All Case outlines: J and L 3 Terminal number Terminal symbol 1 VDDVDD2 MIN DD3 AINMIN4 BINAIN5 CLK T NC 6 CLK S BIN7 INV CLK T8 TS CLK S 9 IO6INV 10 IO5TS 11 IO4IO612 IO3IO513 IO2IO414 IO1IO315 IO0IO216 GND IO117 TFLG IO018 BOUTNC 19 AOUTGND 20 M
44、OUTGND 21 LDR TFLG 22 CLK A BOUT23 CLK M AOUT24 CLK B MOUT25 - LDR 26 - CLK A 27 - CLK M 28 - CLK B FIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89711 DEFENSE SUPPLY CENTER
45、COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 8 DSCC FORM 2234 APR 97 FIGURE 2. Block diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89711 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 4
46、3218-3990 REVISION LEVEL B SHEET 9 DSCC FORM 2234 APR 97 FIGURE 3. Switching waveforms and test circuit. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89711 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 432
47、18-3990 REVISION LEVEL B SHEET 10 DSCC FORM 2234 APR 97 FIGURE 3. Switching waveforms and test circuit - Continued. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89711 DEFENSE SUPPLY CENTER COLUMBUS COLUMBU
48、S, OHIO 43218-3990 REVISION LEVEL B SHEET 11 DSCC FORM 2234 APR 97 NOTE: The INV control must be asserted on or before the rising edge of CLK, and held in the desired state until after the falling edge of CLK. FIGURE 3. Switching waveforms and test circuit - Continued. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89711 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVI
