1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add device type 04. Add 3.10, 3.10.1, and 3.10.2. Editorial changes throughout. 92-03-04 M. A. Frye B Changes in accordance with NOR 5962-R057-96 96-03-13 M. A. Frye C Update drawing to current requirements. Editorial changes throughout. - gap 01
2、-11-08 Raymond Monnin D Boilerplate update, part of 5 year review. ksr 07-04-02 Robert M. Heber THE ORIGINAL FRONT PAGE HAS BEEN REPLACED. REV SHET REV SHET REV STATUS REV D D D D D D D D D D D OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 PMIC N/A PREPARED BY Kenneth S. Rice DEFENSE SUPPLY CENTER COLUMBU
3、S STANDARD MICROCIRCUIT DRAWING CHECKED BY Charles Reusing COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 89-08-23 MICROCIRCUIT, MEMORY, DIGITAL, CMOS, P
4、ROGRAMMABLE LOGIC ARRAY, MONOLITHIC SILICON AMSC N/A REVISION LEVEL D SIZE A CAGE CODE 67268 5962-89755 SHEET 1 OF 11 DSCC FORM 2233 APR 97 5962-E312-07 .Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89755
5、DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying
6、Number (PIN). The complete PIN is as shown in the following example: 5962-89755 01 K A Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function A
7、ccess time 01 C22V10L 22-input 10-output 25 ns and-or-logic array 02 C22V10L 22-input 10-output 30 ns and-or-logic array 03 C22V10L 22-input 10-output 40 ns and-or-logic array 04 C22V10L 22-input 10-output 20 ns and-or-logic array 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-S
8、TD-1835 and as follows: Outline letter Descriptive designator Terminals Package style K GDFP2-F24 or CDFP3-F24 24 Flat package L GDIP3-T24 or CDIP4-T24 24 Dual-in-line 3 CQCC1-N28 28 Leadless chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute m
9、aximum ratings. 1/ Supply voltage range -0.5 V dc to +7.0 V dc Input voltage range -2.0 V dc to +7.0 V dc 2/ Output voltage applied -0.5 V dc to +7.0 V dc 2/ Output sink current . 16 mA Thermal resistance, junction-to-case (JC) See MIL-STD-1835 Maximum power dissipation (PD) 3/ . 1.2 W Maximum junct
10、ion temperature . +175C Lead temperature (soldering, 10 seconds maximum) . +300C _ 1/ All voltages referenced to VSS. 2/ Minimum voltage is -0.6 V dc which may undershoot to -2.0 V dc for pulses of less than 20 ns. Maximum output pin voltage is VCC+0.75 V dc which may overshoot to +7.0 V dc for puls
11、es of less than 20 ns. 3/ Must withstand the added PDdue to short circuit test; e.g., IOS. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89755 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISI
12、ON LEVEL D SHEET 3 DSCC FORM 2234 APR 97 1.4 Recommended operating conditions. Supply voltage range (VCC) . 4.5 V dc to 5.5 V dc High level input voltage (VIH) . 2.0 V dc minimum Low level input voltage (VIL) . 0.8 V dc maximum Case operating temperature range (TC) -55C to +125C 2. APPLICABLE DOCUME
13、NTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFEN
14、SE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List
15、of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA
16、19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3
17、. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified man
18、ufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Manage
19、ment (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify wh
20、en the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.2 Truth tabl
21、e. The truth table shall be as specified on figure 2. 3.2.2.1 Unprogrammed devices. The truth table for unprogrammed devices for contracts involving no altered item drawing shall be as specified on figure 2. When required in group A, C, or D inspections (see 4.3), the devices shall be programmed by
22、the manufacturer prior to test with a minimum of 50 percent of the total number of gates programmed or to any altered item drawing pattern which includes at least 25 percent of the total number of gates programmed. 3.2.2.2 Programmed devices. The requirements for supplying programmed devices are not
23、 part of this drawing. 3.2.3 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89755 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 4321
24、8-3990 REVISION LEVEL D SHEET 4 DSCC FORM 2234 APR 97 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements
25、. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the m
26、anufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-
27、JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be requi
28、red from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, app
29、endix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for a
30、ny change that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Pro
31、cessing options. Since the device is capable of being programmed by either the manufacturer or the user to result in a wide variety of configurations; two processing options are provided for selection in the contract, using an altered item drawing. 3.10.1 Unprogrammed device delivered to the user. A
32、ll testing shall be verified through group A testing as defined in 3.2.2.1 and table II. It is recommended that users perform subgroups 7 and 9 after programming to verify the specific program configuration. 3.10.2 Manufacturer-programmed device delivered to the user. All testing requirements and qu
33、ality assurance pro- visions herein, including the requirements of the altered item drawing, shall be satisfied by the manufacturer prior to delivery. 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening.
34、 Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition D. The test circuit shall be maintained by
35、the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-
36、883. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. Provided by IHSNot for ResaleNo reproduction or networking permitted w
37、ithout license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89755 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ VSS= 0 V 4.5 V VCC 5.5 V -55C TC +125C Group
38、A subgroups Device type Limits Unit unless otherwise specified Min Max High level output voltage VOHIO= -2.0 mA VIL= 0.8 V 1, 2, 3 All 2.4 V VIH= 2.0 V Low level output voltage VOLIO= 12.0 mA VIL= 0.8 V 1, 2, 3 All 0.5 V VIH= 2.0 V High impedance output IOZVCC= 5.5 V and 1, 2, 3 All -10 10 A leakage
39、 current 2/ VO= 5.5 V, VO= GND High level input current IIHVIH= 5.5 V 1, 2, 3 All 10 A IH= 2.4 V 1, 2, 3 All 10 A Low level input current IILVIL= 0.4 V 1, 2, 3 All -10 A VIL= GND 1, 2, 3 All -10 A Supply current ICCVCC= 5.5 V, VIN= GND 1, 2, 3 All 15 mA Outputs open Clocked power supply ICC2f = 1 MH
40、z, VCC= 5.5 V, 1, 2, 3 All 20 mA current 3/ Outputs open Output short circuit IOSVCC= 5.5 V and 4.5 V 1, 2, 3 All -30 -90 mA current 3/ VO= 0.5 V Input capacitance CINVI= 0 V, VCC= 5.0 V 4 All 10 pF 4/ 5/ TA= +25C, f = 1 MHz (see 4.3.1c) Output capacitance COUTVO= 0 V, VCC= 5.0 V 4 All 12 pF 4/ 5/ T
41、A= +25C, f = 1 MHz (see 4.3.1c) Input or feedback to tPDVCC= 4.5 V, CL= 50 pF 9, 10, 11 01 25 ns nonregistered output See figure 3, circuit B and 02 30 figure 4 03 40 04 20 Clock to output tCO9, 10, 11 01, 04 15 ns 02 20 03 25 Clock period tP9, 10, 11 01 33 ns 02 40 03 55 04 20 See footnotes at end
42、of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89755 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characte
43、ristics - Continued. Test Symbol Conditions 1/ VSS= 0 V 4.5 V VCC 5.5 V -55C TC +125C Group A subgroups Device type Limits Unit unless otherwise specified Min Max Input to output enable tEAVCC= 4.5 V, CL= 5 pF 9, 10, 11 01 25 ns See figure 3, circuit A and 02 30 figure 4 03 40 04 20 Input to output
44、disable tER9, 10, 11 01 25 ns 02 30 03 40 04 20 Clock pulse width 4/ 6/ tWVCC= 4.5 V, CL= 50 pF 9, 10, 11 01 15 ns See figure 3, circuit B and 02 20 figure 4 03 27 04 10 Setup time 4/ 6/ tSU9, 10, 11 01 18 ns 02 20 03 30 04 17 Hold time 4/ 6/ tH9, 10, 11 All 0 ns Maximum clock frequency fMAX9, 10, 1
45、1 01 30 MHz 4/ 6/ 02 25 03 18 04 31 Asynchronous reset pulse tAW9, 10, 11 01 25 ns width 02 30 03 40 04 20 Asynchronous reset tAR9, 10, 11 01 25 ns recovery time 02 30 03 40 04 20 Asynchronous reset to tAP9, 10, 11 01 25 ns registered output reset 02 30 03 40 04 22 1/ All voltages are referenced to
46、ground. 2/ I/O terminal leakage is the worst case of IIXor IOZ. 3/ Only one output shorted at a time. 4/ Tested initially and after any design or process changes that affect that parameter, and therefore shall be guaranteed to the limits specified in table I. 5/ All pins not being tested are to be o
47、pen. 6/ Test applies only to registered outputs. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89755 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 7 DSCC FORM 2234 APR 97 D
48、evice types 01 - 04 Case outlines L and K 3 Terminal Terminal symbol number 1 CK/I NC 2 I CK/I 3 I I 4 I I 5 I I 6 I I 7 I I 8 I NC 9 I I 10 I I 11 I I 12 GND I 13 I I 14 I/O GND 15 I/O NC 16 I/O I 17 I/O I/O 18 I/O I/O 19 I/O I/O 20 I/O I/O 21 I/O I/O 22 I/O NC 23 I/O I/O 24 VCCI/O 25 - I/O 26 - I/O 27 - I/O 28 - VCCNC = No connection. FIGURE 1. Terminal connections. Provided by IHSNot for
