DLA SMD-5962-89950 REV B-2012 MICROCIRCUIT DIGITAL ADVANCED CMOS DUAL NEGATIVE EDGE TRIGGERED JK FLIPFLOP WITH ASYNCHRONOUS SET AND CLEAR TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf

上传人:diecharacter305 文档编号:699701 上传时间:2019-01-01 格式:PDF 页数:21 大小:261.04KB
下载 相关 举报
DLA SMD-5962-89950 REV B-2012 MICROCIRCUIT DIGITAL ADVANCED CMOS DUAL NEGATIVE EDGE TRIGGERED JK FLIPFLOP WITH ASYNCHRONOUS SET AND CLEAR TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf_第1页
第1页 / 共21页
DLA SMD-5962-89950 REV B-2012 MICROCIRCUIT DIGITAL ADVANCED CMOS DUAL NEGATIVE EDGE TRIGGERED JK FLIPFLOP WITH ASYNCHRONOUS SET AND CLEAR TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf_第2页
第2页 / 共21页
DLA SMD-5962-89950 REV B-2012 MICROCIRCUIT DIGITAL ADVANCED CMOS DUAL NEGATIVE EDGE TRIGGERED JK FLIPFLOP WITH ASYNCHRONOUS SET AND CLEAR TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf_第3页
第3页 / 共21页
DLA SMD-5962-89950 REV B-2012 MICROCIRCUIT DIGITAL ADVANCED CMOS DUAL NEGATIVE EDGE TRIGGERED JK FLIPFLOP WITH ASYNCHRONOUS SET AND CLEAR TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf_第4页
第4页 / 共21页
DLA SMD-5962-89950 REV B-2012 MICROCIRCUIT DIGITAL ADVANCED CMOS DUAL NEGATIVE EDGE TRIGGERED JK FLIPFLOP WITH ASYNCHRONOUS SET AND CLEAR TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf_第5页
第5页 / 共21页
点击查看更多>>
资源描述

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Correct the drawing title to accurately describe the device function. Update the boilerplate to current requirements as specified in MIL-PRF-38535. Editorial changes throughout. jak 06-07-19 Thomas M. Hess B Update boilerplate paragraphs to the c

2、urrent MIL-PRF-38535 requirements. - LTG 12-12-19 Thomas M. Hess REV SHEET REV B B B B B B SHEET 15 16 17 18 19 20 REV STATUS REV B B B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Joseph A. Kerby DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/ww

3、w.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A CHECKED BY Thomas J. Ricciuti APPROVED BY Monica L. Poelking MICROCIRCUIT, DIGITAL, , ADVANCED CMOS, DUAL NEGATIVE EDGE TRIGGERED JK FLIP-FL

4、OP WITH ASYNCHRONOUS SET AND CLEAR, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON DRAWING APPROVAL DATE 93-01-19 REVISION LEVEL B SIZE A CAGE CODE 67268 5962-89950 SHEET 1 OF 20 DSCC FORM 2233 APR 97 5962-E066-13 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from I

5、HS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89950 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes M, Q, and B) and space ap

6、plication (device classes S and V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following exampl

7、e: 5962 - 89950 01 M E A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2) Device class designator Case outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes B, S, Q, and V RHA marked devices meet the MIL-PRF-3

8、8535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s)

9、identify the circuit function as follows: Device type Generic number Circuit function 01 54ACT112 Dual negative edge triggered JK flip-flop with asynchronous set and clear, TTL compatible inputs 1.2.3 Device class designator. The device class designator is a single letter identifying the product ass

10、urance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A B, S, Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case

11、 outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 Dual-in-line F GDFP2-F16 or CDFP3-F16 16 Flat pack 2 CQCC1-N20 or CQCC2-N20 20 Square leadless chip carrier 1.2.5 Lead finish.

12、The lead finish is as specified in MIL-PRF-38535 for device classes B, S, Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89950 DLA LAND AND MARITIME C

13、OLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ 2/ Supply voltage range (VCC) . -0.5 V dc to +6.0 V dc DC input voltage range (VIN) . -0.5 V dc to VCC + 0.5 V dc DC output voltage range (VOUT) -0.5 V dc to VCC+ 0.5 V dc DC input diode current

14、(IIK) (0.0 V VIN, VIN VCC) 20 mA DC output diode current (IOK) (0.0 V VOUT, VOUT VCC) . 20 mA DC output current (IOUT) (per output pin) . 50 mA DC VCCor GND current (ICC, IGND) (per pin) 200 mA 3/ Storage temperature range (TSTG) -65C to +150C Maximum power dissipation (PD) . 500 mW Lead temperature

15、 (soldering, 10 seconds) . +300C Thermal resistance, junction-to-case (JC) See MIL-STD-1835 Junction temperature (TJ) . +175C Case operating temperature range (TC) -55C to +125C 1.4 Recommended operating conditions. 1/ 2/ 4/ Supply voltage range (VCC) . +4.5 V dc to +5.5 V dc Input voltage range (VI

16、N) . 0.0 V to VCC Output voltage range (VOUT) 0.0 V to VCCMaximum low level input voltage (VIL): VCC= 4.5 V and VCC= 5.5V 0.8 V Minimum high level input voltage (VIH): VCC= 4.5 V and VCC= 5.5V 2.0 V Case operating temperature range (TC) -55C to +125C Input rise or fall rate (tr, tf) maximum: (from V

17、IN= 0.8 V to 2.0 V, 2.0 V to 0.8 V) 125 mV/ns Maximum high level output current (IOH) . -24 mA Maximum low level output current (IOL) . 24 mA 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this draw

18、ing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-88

19、3 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https

20、:/assist.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 1/ Stresses above the absolute maximum rating may cause permanent damage to the device, Extended operation at the maximum levels may degrade performance and a

21、ffect reliability. The maximum junction temperature may be exceeded for allowable short duration burn-in screening conditions in accordance with method 5004 of MIL-STD-883. 2/ Unless otherwise noted, all voltages are referenced to GND. 3/ For packages with multiple VCCand GND pins, this value repres

22、ents the maximum total current flowing into or out of all VCCor GND pins. 4/ Unless otherwise specified the values listed above shall apply over the full VCCand TCrecommended operating range. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD M

23、ICROCIRCUIT DRAWING SIZE A 5962-89950 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of these

24、 documents cited in the solicitation or contract. JEDEC SOLID STATE TECHNOLOGY ASSOCIATION (JEDEC) JESD20 - Standard for Description of 54/74ACXXXXX and 54/74ACTXXXXX Advanced High-Speed CMOS Devices. JESD78 - IC Latch-Up Test. (Copies of these documents are available online at http:/www.jedec.org o

25、r from JEDEC Solid State Technology Association, 3103 North 10thStreet, Suite 240-S Arlington, VA 22201-2107).). ASTM INTERNATIONAL (ASTM) ASTM F1192 - Standard Guide for the Measurement of Single Event Phenomena (SEP) Induced by Heavy Ion Irradiation of Semiconductor Devices. (Copies of this docume

26、nt is available online at http:/www.astm.org/ or from ASTM International, 100 Barr Harbor Drive, P. O. Box C700, West Conshohocken, PA 19428-2959). 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes pre

27、cedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes B, S, Q and V shall be in accordance with MIL-PRF-38535 as specified herein

28、, or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class leve

29、l B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes B, S, Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outlines

30、. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5

31、Ground bounce waveform and test circuit. The ground bounce waveform and test circuit shall be as specified on figure 4. 3.2.6 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 5. 3.3 Electrical performance characteristics and postirradiati

32、on parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall

33、 be the subgroups specified in table IIA. The electrical tests for each subgroup are defined in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89950 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 R

34、EVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the opt

35、ion of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes B, S, Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certi

36、fication/compliance mark. The certification mark for device classes B, S, Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes B, S, Q and V, a c

37、ertificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MI

38、L-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes B, S, Q and V, the requirements of MIL-PRF-38535 and herein or fo

39、r device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes B, S, Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits d

40、elivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DLA Land and Maritime-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for

41、 device class M. For device class M, DLA Land and Maritime, DLA Land and Maritimes agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.1

42、0 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 38 (see MIL-PRF-38535, appendix A). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING

43、 SIZE A 5962-89950 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test and MIL-STD-883 test method 1/ Symbol Test conditions 2/ -55C TC +125C 4.5 V VCC 5.5 V unless otherwise specified Device type 3/ and

44、 device class VCCGroup A subgroups Limits 4/ Unit Min Max High level output voltage 3006 VOH15/ For all inputs affecting output under under test VIN= VIH= 2.0 V or VIL= 0.8 V For all other inputs VIN= VCCor GND IOH= -50 A All All 4.5 V 1, 2, 3 4.4 V VOH2For all inputs affecting output under under te

45、st VIN= VIH= 2.0 V or VIL= 0.8 V For all other inputs VIN= VCCor GND IOH= -50 A All All 5.5 V 1, 2, 3 5.4 VOH3For all inputs affecting output under under test VIN= VIH= 2.0 V or VIL= 0.8 V For all other inputs VIN= VCCor GND IOH= -24 mA All All 4.5 V 1, 2, 3 3.7 VOH45/ For all inputs affecting outpu

46、t under under test VIN= VIH= 2.0 V or VIL= 0.8 V For all other inputs VIN= VCCor GND IOH= -24 mA All All 5.5 V 1, 2, 3 4.7 VOH56/ For all inputs affecting output under under test VIN= VIH= 2.0 V or VIL= 0.8 V For all other inputs VIN= VCCor GND IOH= -50 mA All All 5.5 V 1, 2, 3 3.85 Low level output

47、 voltage 3007 VOL15/ For all inputs affecting output under under test VIN= VIH= 2.0 V or VIL= 0.8 V For all other inputs VIN= VCCor GND IOL= +50 A All All 4.5 V 1, 2, 3 0.1 V VOL2For all inputs affecting output under under test VIN= VIH= 2.0 V or VIL= 0.8 V For all other inputs VIN= VCCor GND IOL= +

48、50 A All All 5.5 V 1, 2, 3 0.1 VOL3For all inputs affecting output under under test VIN= VIH= 2.0 V or VIL= 0.8 V For all other inputs VIN= VCCor GND IOL= +24 mA All B, S, Q, V 4.5 V 1, 3 0.4 2 0.5 All M 1 0.4 2, 3 0.5 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89950 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test and MIL-STD-883 test method 1/ Symbol

展开阅读全文
相关资源
猜你喜欢
相关搜索

当前位置:首页 > 标准规范 > 国际标准 > 其他

copyright@ 2008-2019 麦多课文库(www.mydoc123.com)网站版权所有
备案/许可证编号:苏ICP备17064731号-1