1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Correct paragraphs 4.2.a.2 and 4.3.3.b.2. Update drawing to current requirements. 05-05-11 Raymond Monnin B Made corrections to paragraph 1.3, table I, figure 2, and figure 4. Figure 1; case outline Y changed .125 max to .147 max and .050 +/- .00
2、5 to .065 +/- .005. -sld 08-04-22 Robert M. Heber THE ORIGINAL FIRST SHEET OF THIS DRAWING HAS BEEN REPLACED. REV SHEET REV B SHEET 15 REV STATUS REV B B B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Gary Zahn DEFENSE SUPPLY CENTER COLUMBUS STANDARD MI
3、CROCIRCUIT DRAWING CHECKED BY Robert M. Heber COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY William K. Heckman MICROCIRCUIT, HYBRID, LINEAR, MIL-STD-1553, DATA TERMINAL BIT PROCESSOR AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING
4、 APPROVAL DATE 91-01-28 AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-90636 SHEET 1 OF 15 DSCC FORM 2233 APR 97 5962-E317-08 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90636 DEFENSE SUPPLY CENTER
5、 COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents five product assurance classes as defined in paragraph 1.2.3 and MIL-PRF-38534. A choice of case outlines and lead finishes which are available and are reflected in the Part
6、or Identifying Number (PIN). When available, a choice of radiation hardness assurance levels are reflected in the PIN. 1.2 PIN. The PIN shall be as shown in the following example: 5962 - 90636 01 H X X Federal RHA Device Device Case Lead stock class designator type class outline finish designator (s
7、ee 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 Radiation hardness assurance (RHA) designator. RHA marked devices shall meet the MIL-PRF-38534 specified RHA levels and shall be marked with the appropriate RHA designator. A dash (-) indicates a non-RHA de
8、vice. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 CT1820 MIL-STD-1553 data terminal bit processor 02 CT1820-2 MIL-STD-1553 data terminal bit processor with high data bus driver capability 03 ARX2410 MIL-STD-1553 da
9、ta terminal bit processor 04 ARX3410 MIL-STD-1553 data terminal bit processor 1.2.3 Device class designator. This device class designator shall be a single letter identifying the product assurance level. All levels are defined by the requirements of MIL-PRF-38534 and require QML Certification as wel
10、l as qualification (Class H, K, and E) or QML Listing (Class G and D). The product assurance levels are as follows: Device class Device performance documentation K Highest reliability class available. This level is intended for use in space applications. H Standard military quality class level. This
11、 level is intended for use in applications where non-space high reliability devices are required. G Reduced testing version of the standard military quality class. This level uses the Class H screening and In-Process Inspections with a possible limited temperature range, manufacturer specified incom
12、ing flow, and the manufacturer guarantees (but may not test) periodic and conformance inspections (Group A, B, C, and D). E Designates devices which are based upon one of the other classes (K, H, or G) with exception(s) taken to the requirements of that class. These exception(s) must be specified in
13、 the device acquisition document; therefore the acquisition document should be reviewed to ensure that the exception(s) taken will not adversely affect system performance. D Manufacturer specified quality class. Quality level is defined by the manufacturers internal, QML certified flow. This product
14、 may have a limited temperature range. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90636 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 1.2.4 Case
15、outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X See figure 1 56 Plug-in package Y See figure 1 60 Flat package 1.2.5 Lead finish. The lead finish shall be as specified in MIL-PRF-38534. 1.3 Absolute max
16、imum ratings. 1/ Supply voltage (VCC) +7.0 V dc Logic input voltage -0.3 V dc to +5.5 V dc CLOCK IN input voltage -0.3 V dc to VCC+ 0.3 V dc Storage temperature . -65C to +150C Lead temperature (soldering, 10 seconds) +300C Power dissipation (PD): Device types 01, 02, and 03. 347 mW Device type 04 .
17、 1392 mW Thermal resistance junction-to-case (JC): Device type 01, 02, and 03, cases X and Y . 5.68C/W Device type 04, cases X and Y 46.64C/W 1.4 Recommended operating conditions. Supply voltage (VCC) +4.5 V dc to +5.5 V dc Case operating temperature range (TC) -55C to +125C 2. APPLICABLE DOCUMENTS
18、2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE S
19、PECIFICATION MIL-PRF-38534 - Hybrid Microcircuits, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard for Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Mi
20、crocircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2
21、.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 1/ Stresses abo
22、ve the absolute maximum ratings may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 59
23、62-90636 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item performance requirements for device classes D, E, G, H, and K shall be in accordance with MIL-PRF-38534. Compliance with MIL-PRF
24、-38534 may include the performance of all tests herein or as designated in the device manufacturers Quality Management (QM) plan or as designated for the applicable device class. The manufacturer may eliminate, modify or optimize the tests and inspections herein, however the performance requirements
25、 as defined in MIL-PRF-38534 shall be met for the applicable device class. In addition, the modification in the QM plan shall not affect the form, fit, or function of the device for the applicable device class. 3.2 Design, construction, and physical dimensions. The design, construction, and physical
26、 dimensions shall be as specified in MIL-PRF-38534 and herein. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.4 herein and figure 1. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2. 3.2.3 Block diagram. The block diagram shall be as
27、specified on figure 3. 3.2.4 Timing diagram(s). The timing diagram(s) shall be as specified on figure 4. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full specified opera
28、ting temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking of device(s). Marking of device(s) shall be in accordance with MIL-PRF-38534. The device
29、 shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers vendor similar PIN may also be marked. 3.6 Data. In addition to the general performance requirements of MIL-PRF-38534, the manufacturer of the device described herein shall maintain the electrical test data (variables
30、 format) from the initial quality conformance inspection group A lot sample, for each device type listed herein. Also, the data should include a summary of all parameters manually tested, and for those which, if any, are guaranteed. This data shall be maintained under document revision level control
31、 by the manufacturer and be made available to the preparing activity (DSCC-VA) upon request. 3.7 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to supply to this drawing. The certificate of compliance (original copy) submitted to DSCC-VA shall a
32、ffirm that the manufacturers product meets the performance requirements of MIL-PRF-38534 and herein. 3.8 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38534 shall be provided with each lot of microcircuits delivered to this drawing. 4. VERIFICATION 4.1 Sampling and
33、inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38534 or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. 4.2 Screening. Screening shall be in acco
34、rdance with MIL-PRF-38534. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to either DSCC-VA or the
35、 acquiring activity upon request. Also, the test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TCas specified in the approved manufacturers QM plan. b. Interim and final electrical t
36、est parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE
37、 A 5962-90636 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Limits Test Symbol Conditions +4.5 V VCC +5.5 V -55C TC +125C unless otherwise specified Group A subgroups Device types Min Max Unit
38、1,2,3 01,02,04 2.0 V Input high voltage VIH Only for D0 - D15, A0-A4 1,2,3 03 3.5 V Input low voltage VIL1,2,3 All 0.7 V CLOCK IN input 1,2,3 All 100 A Input high current IIHVIN= 2.5 V All other inputs 1,2,3 All 20 A CLOCK IN input 1,2,3 All 0.1 mA Input low current IILVIN= 0.4 V All other inputs 1,
39、2,3 All -0.4 mA Outputs D0 - D15, ESC OUT, DSC OUT, and CLOCK OUT, IOH= -1000 A 1,2,3 All 2.5 V Output MODE CODE, IOH= -600 A 1,2,3 All 2.5 V Output high voltage VOHAll other outputs, IOH= -400 A 1,2,3 All 2.5 V IOL= 6.0 mA 1,2,3 01 0.4 V IOL= 10 mA 1,2,3 02,04 0.4 V Outputs D0 - D15 IOL= 3.6 mA 1,2
40、,3 03 0.4 V Output MODE CODE IOL= 6.0 mA 1,2,3 All 0.4 V Outputs ESC OUT and DSC OUT, IOL= 1.2 mA 1,2,3 All 0.4 V Output CLOCK OUT IOL= 1.0 mA 1,2,3 All 0.4 V Output low voltage VOLAll other outputs, IOL= 4.0 mA 1,2,3 All 0.4 V Clock input high voltage VIHC1,2,3 All VCC- 0.5 V See footnotes at end o
41、f table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90636 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance character
42、istics - Continued. Limits Test Symbol Conditions +4.5 V VCC +5.5 V -55C TC +125C unless otherwise specified Group A subgroups Device types Min Max Unit Clock input low voltage VILC1,2,3 All GND + 0.5V Clock output high voltage VOHC1,2,3 All VCC- 0.3 V Clock output low voltage VOLC1,2,3 All GND + 0.
43、3V 01-03 50 Logic supply current ICC1,2,3 04 240 mA 01,02,04 13 Oscillator/clock supply current IOSC1,2,3 03 30 mA Functional test FT See 4.3.1c 7,8A,8B All Encoder timing ENC ENA setup time tE19,10,11 All 100 ns 9,10,11 01,02 80 ns ENC ENA hold time tE29,10,11 03,04 100 ns SYNC SELECT setup time tE
44、39,10,11 All 125 ns SYNC SELECT hold time tE49,10,11 All 150 ns SEND DATA delay time tE5See figure 4. 9,10,11 All 75 ns LATCH DATA hold time tE69,10,11 All 25 ns LATCH DATA setup time tE79,10,11 All 50 ns Parallel data setup time tE8, tE121/ 9,10,11 All 40 ns See footnotes at end of table. Provided
45、by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90636 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued
46、. Limits Test Symbol Conditions +4.5 V VCC +5.5 V -55C TC +125C unless otherwise specified Group A subgroups Device types Min Max Unit Encoder timing - Continued. Parallel data hold time tE9, tE131/ 9,10,11 All 60 ns DATA SELECT disable time tE109,10,11 All 30 ns DATA SELECT hold time tE11See figure
47、 4. 9,10,11 All 0 ns Decoder timing TAKE DATA delay on time tD19,10,11 All 125 ns TAKE DATA delay off time tD29,10,11 All 125 ns 9,10,11 01,02 60 ns Sync delay time tD39,10,11 03,04 110 ns VAILD WORD delay time tD49,10,11 All 125 ns BROADCAST delay time tD59,10,11 All 70 ns RT ENABLE delay time tD69
48、,10,11 All 100 ns MODE CODE delay time tD79,10,11 All 100 ns DATA SELECT input delay time 2/ tD89,10,11 All 0 ns 9,10,11 01,02 60 ns Parallel data output delay time tD9See figure 4. 9,10,11 03,04 75 ns 1/ tE12and tE13apply only when LATCH DATA is not used. 2/ DATA SELECT may be applied at any time that the 16 line I/O is otherwise free. The parallel data out, however, is not “new data“ until tD9after TAKE DATA goes high. Provided by IHSNot for ResaleNo reproducti
