DLA SMD-5962-90906 REV B-2013 MICROCIRCUIT DIGITAL ADVANCED CMOS DUAL 1-OF-4 DATA SELECTORS MULTIPLEXERS WITH THREE-STATE OUTPUTS AND TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf

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1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Update boilerplate to MIL-PRF-38535 requirements. LTG 06-11-21 Thomas M. Hess B Update boilerplate paragraphs to the current MIL-PRF-38535 requirements. - LTG 13-01-25 Thomas M. Hess REV SHEET REV SHEET REV STATUS REV B B B B B B B B B B B B B OF

2、 SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 PMIC N/A PREPARED BY Marcia B. Kelleher DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A

3、CHECKED BY Thomas J. Riccuiti APPROVED BY Michael A. Frye MICROCIRCUIT, DIGITAL, ADVANCED CMOS, DUAL 1-OF-4 DATA SELECTORS/MULTIPLEXERS WITH THREE-STATE OUTPUTS AND TTL COMPATIBLE INPUTS, MONOLITHIC SILICON DRAWING APPROVAL DATE 90-10-01 REVISION LEVEL B SIZE A CAGE CODE 67268 5962-90906 SHEET 1 OF

4、13 DSCC FORM 2233 APR 97 5962-E146-13 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90906 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. T

5、his drawing documents two product assurance class levels consisting of high reliability (device class Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radi

6、ation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 90906 01 M E A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2) Device class designator Case outline (see 1.2.4) Lead finish (see 1.2.5) / (se

7、e 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the

8、appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54ACT11353 Dual 1-of-4 data selectors/multiplexers with three-state outputs and TTL compatible inputs 1

9、.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance

10、 with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 Dual-in-line 2 CQCC1-N20 20 S

11、quare leadless chip carrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING

12、SIZE A 5962-90906 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range (VCC) -0.5 V dc to +7.0 V dc Input voltage range (VIN) -0.5 V dc to VCC+ 0.5 V dc Output voltage range (VOUT) . -0.5 V dc to VC

13、C+ 0.5 V dc Input clamp current (IIK) 20 mA Output clamp current (IOK) 50 mA Continuous output current (IOUT) 50 mA VCCor GND current (ICC, IGND) 100 mA Storage temperature range (TSTG) . -65C to +150C Maximum power dissipation (PD) . 500 mW Lead temperature (soldering 10 seconds) . +300C Thermal re

14、sistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ). +175C 4/ 1.4 Recommended operating conditions. 2/ 3/ Supply voltage range (VCC) +4.5 V dc to +5.5 V dc Input voltage range (VIN) 0.0 V dc to VCCOutput voltage range (VOUT) . 0.0 V dc to VCCMinimum high level input voltage

15、(VIH) . 2.0 V Maximum low level input voltage (VIL) 0.8 V Case operating temperature range (TC) . -55C to +125C Input rise or fall time (tr, tf) 0 to 10 ns/V 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a p

16、art of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STAN

17、DARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available

18、 online at https:/assist.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade p

19、erformance and affect reliability 2/ Unless otherwise specified, all voltages are referenced to GND. 3/ The limits for the parameters specified herein shall apply over the full specified VCCrange and case temperature range of -55C to +125C. 4/ Maximum junction temperature shall not be exceeded excep

20、t for allowable short duration burn-in screening conditions per method 5004 of MIL-STD-883. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90906 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL

21、 B SHEET 4 DSCC FORM 2234 APR 97 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents cited in the solicitation or contract. JEDEC SOLID STATE TECHNOLOGY ASSOCIATION (JEDEC) J

22、ESD20 - Standard for Description of 54/74ACXXXXX and 54/74ACTXXXXX Advanced High-Speed CMOS Devices. (Copies of these documents are available online at http:/www.jedec.org or from JEDEC Solid State Technology Association, 3103 North 10thStreet, Suite 240-S Arlington, VA 22201-2107). 2.3 Order of pre

23、cedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requi

24、rements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 as specified herein, or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein

25、. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF

26、-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The tru

27、th table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 4. 3.3 Electrical performance characteristics and postirradiation

28、 parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall b

29、e the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasibl

30、e due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in acco

31、rdance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compl

32、iance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed

33、 as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements o

34、f MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with e

35、ach lot of microcircuits delivered to this drawing. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90906 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 3.8 Not

36、ification of change for device class M. For device class M, notification to DLA Land and Maritime-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class

37、 M, DLA Land and Maritime, DLA Land and Maritimes agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment f

38、or device class M. Device class M devices covered by this drawing shall be in microcircuit group number 39 (see MIL-PRF-38535, appendix A). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90906 DLA LAND AND M

39、ARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Test conditions -55C TC +125C unless otherwise specified Group A subgroups Device type Limits Unit Min Max High level output voltage VOHIOH= -50 A VCC = 4.5 V

40、 1, 2, 3 All 4.4 V VCC= 5.5 V 5.4 IOH= -24 mA VCC = 4.5 V 3.7 VCC= 5.5 V 4.7 IOH= -50 mA 1/ VCC = 5.5 V 3.85 Low level output voltage VOLIOL= 50 A VCC = 4.5 V 1, 2, 3 All 0.1 V VCC= 5.5 V 0.1 IOL= 24 mA VCC = 4.5 V 0.5 VCC= 5.5 V 0.5 IOL= 50 mA 1/ VCC = 5.5 V 1.65 Off-state output current, voltage a

41、pplied IOZVOUT= VCCor GND VCC= 5.5 V 1, 2, 3 All 10.0 A Input leakage current, low IILVIN= 0.0 V VCC= 5.5 V 1, 2, 3 All -1.0 A Input leakage current, high IIHVIN= 5.5 V VCC= 5.5 V 1, 2, 3 All +1.0 A Quiescent supply current ICC VIN= VCCor GND IOUT= 0.0 mA VCC= 5.5 V 1, 2, 3 All 160 A Quiescent suppl

42、y current delta 2/ ICCOne input at 3.4 V Other inputs at VCCor GND VCC= 5.5 V 1, 2, 3 All 1.0 mA Input capacitance CINSee 4.4.1c 4 All 7 pF Output capacitance COUTSee 4.4.1c 4 All 16 pF Power dissipation capacitance (per multiplexer) 3/ CPDVIN= VCCor GND CL= 50 pF, f = 1 MHz Outputs enabled See 4.4.

43、1c VCC= 5.0 V 4 All 49 pF VIN= VCCor GND CL= 50 pF, f = 1 MHz Outputs disabled See 4.4.1c VCC= 5.0 V 4 All 24 pF Functional tests VCC= 5.5 V See 4.4.1d 7, 8 All See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD M

44、ICROCIRCUIT DRAWING SIZE A 5962-90906 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Test conditions -55C TC +125C unless otherwise specified Group A subgroups Device type Limits Un

45、it Min Max Propagation delay time, from A and B to any Y tPLH1CL= 50 pF RL= 500 See figure 4 VCC= 4.5 V 9 All 1.5 11.1 ns 10, 11 1.5 13.8 tPHL1 VCC= 4.5 V 9 1.5 8.3 10, 11 1.5 10.1 Propagation delay time, from any C to any Y tPLH2CL= 50 pF RL= 500 See figure 4 VCC= 4.5 V 9 All 1.5 9.8 ns 10, 11 1.5

46、12.3 tPHL2VCC= 4.5 V 9 1.5 7.2 10, 11 1.5 10.5 Propagation delay time, output enable, G to any Y tPZHCL= 50 pF RL= 500 See figure 4 VCC= 4.5 V 9 All 1.5 6.8 ns 10, 11 1.5 7.9 tPZLVCC= 4.5 V 9 1.5 6.7 10, 11 1.5 7.8 Propagation delay time, output disable, G to any Y tPHZCL= 50 pF RL= 500 See figure 4

47、 VCC= 4.5 V 9 All 1.5 7.8 ns 10, 11 1.5 8.6 tPLZVCC= 4.5 V 9 1.5 6.9 10, 11 1.5 7.6 1/ Not more than one output will be tested at one time, and the duration of the test shall not exceed 10 ms. 2/ This is the increase in supply current for each input that is at one of the specified TTL voltage levels

48、 rather than 0.0 V or VCC. 3/ Power dissipation capacitance (CPD) determines both the dynamic power consumption (PD) and the dynamic current consumption (IS). Where: PD= (CPD+ CL) (VCCx VCC)f + (ICCx VCC) + (n x d x ICCx VCC) IS= (CPD+ CL) VCCf + ICC+ (n x d x ICC) For both PDand IS, n is number of device inputs at TTL levels; f is the frequency of the input signal; d is duty cycle of the input signal; and CLis the external output load capacitance. Provided by IHSNot for ResaleNo reproduction or networking permitted wit

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