1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Reformatted with updated boilerplate for 5 year review. lhl 12-05-08 Charles F. Saffle THE ORIGINAL FIRST SHEET OF THIS DRAWING HAS BEEN REPLACED. REV SHEET REV A A A A A A SHEET 15 16 17 18 19 20 REV STATUS REV A A A A A A A A A A A A A A OF SHE
2、ETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Kenneth S. Rice DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE CHECKED BY Ra
3、jesh Pithadia APPROVED BY Michael A. Frye MICROCIRCUIT, MEMORY, DIGITAL, CMOS, ELECTRICALLY ERASABLE PROGRAMMABLE LOGIC DEVICE, MONOLITHIC SILICON DRAWING APPROVAL DATE 92-11-24 AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-92121 SHEET 1 OF 20 DSCC FORM 2233 APR 97 5962-E326-12 Provided by I
4、HSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92121 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class l
5、evels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflect
6、ed in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 92121 01 M L A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2) Device class designator Case outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator.
7、Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates
8、 a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function Access time 01 20RA10 20-input, 10-output, multiple clock, architecturally 25 ns generic, EECMOS, programmable AND/OR array 02 20RA10 20-input, 10-output,
9、 multiple clock, architecturally 20 ns generic, EECMOS, programmable AND/OR array 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requir
10、ements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 as follows: Outline letter Descriptive designator Te
11、rminals Package style L GDIP3-T24 or CDIP4-T24 24 Dual-in-line 3 CQCC1-N28 28 Square leadless chip carrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q, and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or
12、networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92121 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) . -0.5 V dc to +7.0 V dc Input voltage applied
13、. -2.5 V dc to VCC +1.0 V dc Off-state output voltage applied -2.5 V dc to VCC +1.0 V dc Storage temperature range -65C to +150C Lead temperature (soldering, 10 seconds) +260C Thermal resistance, junction-to-case (JC) See MIL-STD-1835 Maximum power dissipation (PD) 2/ 1.3 Watts Junction temperature
14、(TJ). +175C Endurance . 100 erase/write cycles (minimum) Data retention . 10 years (minimum) 1.4 Recommended operating conditions. Supply voltage range (VCC) 4.5 V dc to 5.5 V dc High level input voltage range (VIH) 2.0 V dc to VCC + 1.0 V dc Low level input voltage range (VIL) . VSS 0.5 V dc to 0.8
15、 V dc High level output current (IOH) -3.2 mA maximum Low level output current (IOL) . 8.0 mA maximum Case operating temperature range (TC) . -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a par
16、t of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-M-38510 - Microcircuits, General Specification for. MIL-PRF-38535 - Integrated Circuits, Manufacturing,
17、 General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcirc
18、uit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the d
19、evice. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Must withstand the added PD due to short circuit test; e.g., IOS. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A
20、5962-92121 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of the documents are the issues of
21、the documents cited in the solicitation. JEDEC SOLID STATE TECHNOLOGY ASSOCIATION (JEDEC) JEDEC Standard No. 78 - IC Latch-Up Test. (Copies of this document are available online at www.jedec.org/ or from JEDEC Solid State Technology Association, 3103 North 10th Street, Suite 240-S, Arlington, VA 222
22、01). (Non-Government standards and other publications are normally available from the organizations that prepare or distribute the documents. These documents also may be available in or through libraries or other informational services.) 2.3 Order of precedence. In the event of a conflict between th
23、e text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for
24、device classes Q and V shall be in accordance with MIL-PRF-38535 as specified herein, or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device
25、class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V o
26、r MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table(s). The truth table(s) shall be as specified on fi
27、gure 2. 3.2.3.1 Unprogrammed devices. The truth table for unprogrammed devices shall be as specified on figure 2. 3.2.3.2 Programmed devices. The requirements for supplying programmed devices are not a part of this drawing. 3.3 Electrical performance characteristics and postirradiation parameter lim
28、its. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroup
29、s specified in table IIA. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to spac
30、e limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with M
31、IL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. Provided by IHSNot for ResaleNo repro
32、duction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92121 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 5 DSCC FORM 2234 APR 97 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be
33、required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The
34、 certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MI
35、L-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of
36、change for device class M. For device class M, notification to DLA Land and Maritime-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DLA Land
37、and Maritime, DLA Land and Maritimes agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device cla
38、ss M. Device class M devices covered by this drawing shall be in microcircuit group number 042 (see MIL-PRF-38535, appendix A). 3.11 Processing of EEPLDs. All testing requirements and quality assurance provisions herein shall be satisfied by the manufacturer prior to delivery. 3.11.1 Conditions of t
39、he supplied devices. Devices will be supplied in cleared state in accordance with truth table on figure 2. No provision will be made for supplying written devices. 3.11.2 Clearing of EEPLDs. When specified, devices shall be cleared in accordance with the procedures and characteristics specified in 4
40、.6.4. 3.11.3 Writing of EEPLDs. When specified, devices shall be written in accordance with the procedures and characteristics specified in 4.6.3. 3.11.4 Verification of state of EEPLDs. When specified, devices shall be verified as either written to the specified pattern or cleared. As a minimum, ve
41、rification shall consist of performing a read of the entire array to verify that all bits are in the proper state. Any bit that does not verify to be in the proper state shall constitute a device failure and the device shall be removed from the lot or sample. 3.12 Endurance. An endurance cycling tes
42、t shall be performed after design and/or process changes which may affect cell programmability and shall consist of an additional 100 cycles as specified in 4.2.1e. A minimum of 15 devices shall be tested with no failures allowed (at the manufacturers option, a minimum of 25 devices may be tested wi
43、th no more than 1 failure permitted). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92121 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical p
44、erformance characteristics. Test Symbol Conditions -55C TC +125C VSS = 0 V; 4.5 V VCC 5.5 V unless otherwise specified Group A subgroups Device types Limits Unit Min Max Input leakage current 1/ ILX 0.0 V VIN VCC 1, 2, 3 All 10 -100 A Bidirectional pin leakage current 1/ II/O/Q 0.0 V VI/O/Q VCC 1, 2
45、, 3 All 10 -100 A Output low voltage VOL VCC = 4.5 V, IOL = 8.0 mA, VIN = VIH or VIL 1, 2, 3 All 0.5 V Output high voltage VOH VCC = 4.5 V, IOH = -3.2 mA, VIN = VIH or VIL 1, 2, 3 All 2.4 V Input low voltage 2/ VIL 1, 2, 3 All VSS -0.5 0.8 V Input high voltage 2/ VIH 1, 2, 3 All 2.0 VCC +1.0 V Opera
46、ting power supply current 3/ ICC VIL = 0.5 V, VIH = 3.0 V, ftog = 15 MHz 1, 2, 3 All 120 mA Output short-circuit current 4/ IOS VCC = 5.0 V, VOUT = 0.5 V, TA = +25C, see 4.4.1f 1 All -50 -135 mA Input capacitance CIN VCC = 5.0 V; VI = 2.0 V, f = 1.0 MHz, TA = +25C, see 4.4.1e 4 All 10 pF Bidirection
47、al pin capacitance CI/O/Q VCC = 0.5 V; VI/O/Q = 2.0 V, f = 1.0 MHz, TA = +25C, see 4.4.1e 4 All 10 pF Functional tests See 4.4.1c 7, 8 All Input or feedback to nonregistered output tPD VCC = 4.5 V, see figures 3 and 4 5/ 9, 10, 11 01 25 ns 02 20 Clock to output delay 6/ tCO 9, 10, 11 01 25 ns 02 20
48、See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92121 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Conditions -55C TC +125C VSS = 0 V; 4.5 V VCC 5.5 V unless otherwise specified Group A subgroups Device types Limits Unit Min Max Input or I/O to output enable tEA1 VCC =
