DLA SMD-5962-92246 REV B-1996 MICROCIRCUIT DIGITAL FAST CMOS OCTAL TRANSCEIVER REGISTER THREE-STATE OUTPUTS TTL COMPATIBLE INPUTS AND LIMITED OUTPUT VOLTAGE SWING MONOLITHIC SILICO.pdf

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1、 SMD-5762-92246 REV B 996 0089433 126 U DEFENSE LOGISTICS AGENCY DEFENSE SUPPLY CENTER, COLUMBUS 3990 EAST BROAD STREET COLUMBUS, OH 43216-5000 IN REPLY REFER TO DSCC-VAC (Mr. Miesse/(614) 692-0543 (DSN 850) SEP 2 6 1996 SUBJECT: Notice of Revision (NOR) 5962-R201-96 for Standard Microcircuit Drawin

2、g (SMD) 5962-92246 Militaryhdustry Distribution The enclosed NOR is approved for use effective as of the date of the NOR. In accordance with MIL-STD-100 SMD holders should, as a minimum, handwrite those changes described in the NOR to sheet 1 of the subject SMD. After completion, the NOR should be a

3、ttached to the subject SMD for future reference. Those companies who were listed as approved sources of supply prior to this action have agreed to actions taken on devices for which they had previously provided DSCC a certificate of compliance. This is evidenced by an existing active current certifi

4、cate of compliance on file at DSCC with a DSCC record of verbal coordination. The certificate of compliance for these devices is considered concurrence with the new revision unless DSCC is otherwise notified. If you have comments or questions, please contact Mr. Bernard Miesse at (614) 692-0543 (DSN

5、 850). 1 Encl hONICA L. POELKING Chief, Custom Microelectronics Team Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SMD-5962-92246 REV B = 999999b 0089434 Ob2 7. CAGE CODE 67268 10. REVISION LElTER a. CURRENT b. NEW A B 1. DATE (YYMMDD) 96-0946 NOTI

6、CE OF REVISION (NOR) THIS REVISION DESCRIBED BELOW HAS BEEN AUTHORIZED FOR THE DOCUMENT LISTED. 8. DOCUMENT NO. 5962-92246 11. ECP NO. NIA ublicraporhng bud?, fw mis dlecbon is estimated lo avetage 2 per respoose. induding tim for reviewing instrudons seaming adsting data sounes athen and mnlainin t

7、he data needed and complebng and reviemng ihe cdlecliai dinkmnabon. send oomnenb regardin mis burden estimate or any olhei spect08his colledion,o!infonmbo, indidin su esons for eucing this burden. to Depaitmenl of eense. Washington deadquarters Services, Direciorata !r Information Operations and Re

8、ofls, 121% Je%-n Daws HI hway. Suite 1204. Arlington. VA 222024302. and to me Omce of Management and Budget. a erwork Reducon Pro add Revisions description colm; add IlChanges in accordance with NOR 5962-R201-96Il. Revisions date colum; add 1196-09-0611. Revision level block; change from I1AI1 to Wi

9、. Rev status of sheets; for sheets 1 and 8, change from llA1l to W, and sheet 2, add llB1l. 1.2.4, Case outline(s), Descriptive designator; change GDIPI-T24 or CDIP2-T24I1 to I1GDIP3-T24 or CDIP4-T24I1. Revision level block; add Table I, low level ground bounce noise, VOLVI device types 01, O2 and 0

10、3; change maxirnun limit frOm Revision level block; change from I1Aa1 to Wi. II- 1 100“ to I- 1500“. f. DATE SIGNED (YYMMDD) 96-09-06 c. DATE SIGNED (YYMMDD 96-09-06 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-W 9999996 0048884 i21 a. CURRENT NEU

11、 I. DATE (YYMHDD) NOTICE OF REVISION (NOR) 93-1 1 -1 8 This revision described belw has been authorized for the document listed. b. NEU A Public reporting,burden,for this collection is estimated to average 2 hours per response, including the time for reviewinf instructions, searching existing data,s

12、ources, gathering and rsintaining the data needed, and cow eting and reviewing the collection of information. Send cmts regarding this burden estimate or an other aspect of this collection of information, including suggestions for reducin this burden, To Degartment of Defense, Uathingtion Headquarte

13、rs Services Directorate for nforma8ion Operations ad e rrts 1215 Jefferson Davis Highway Suite 1M4 Art: ton VA 22202-4302, and to the Office of an ;ment and Bu$etE Paperwork Rduction Prohct tO%-Ob, Washington OC 20503. ACTIVITY NUMBER LISTED IN ITEM 2 OF THIS FORM. PLEASE DO NOTYETURN YOUR C PL TED

14、FORH TO EITHER OF THiSE ADDRESSED RETURN COMLETED FORH TO THE GOVERNRENT ISSUING CONTRACTING OFFICER FOR THE CONTRACT/ PROCURING b. ACTIVITY AUTHORIZED TO APPROVE CHANGE FOR GOVERNMENT DESC-ECC b. ADDRESS (Street, City, State, Zip Code) 7. CAGE CODE 4. ORIGINATOR Defense Electronics Supply Center 15

15、07 Uilmington Pike Dayton, OH 45444-5270 a. TYPED NAHE (First, Middle Initial, Last 1 c. TYPED NAME (First, Middle Initial, Last) Monica L. Poelking 9. TITLE OF DOCUHENT MICROCIRCUIT, DIGITAL, FAST CMOS, OCTAL TRANSCEIVER/REGISTER THREE-STATE OUTPUTS, TTL CORPATIBLE INPUTS AND LIMITED OUTPUT VOLTAGE

16、 SUING, HONOLITHIC SILICON d. TITLE e. SIGNATURE Chief, Custom Microelectronics Monica L. Poelking 15a. ACTIVITY ACCOMPLISHING REVISION b. REVISION COMPLERD (Signature) DESC-ECC Joseph A. Kerby 12. CONFIGURATION ITER (OR SYSTEH) TO WHICH ECP APPLIES ALL f. DATE SIGNED ( WMMDD) 93-11-18 c. DATE SIGNE

17、D (YYMMDD) 93-11-18 10. REVISION LETTER Form Approved ORB Ho. 0704-0188 2. PROCURING ACTIVITY NO. 3. DODAAC 6. NOR NO. 5962-Ro30-94 8. DOCUMENT NO. 5962-92246 11. ECP No. N/A 13. DESCRIPTION OF REVISION Sheet 1: Revisions Ltr column; add “A“. Revisions description column; add “Changes in accordance

18、with NOR 5962-R030-94“. Revisions date column; add “93-11-18“. Revision level block; add “A“. Rev status of sheets; for sheets 1 and 8, add “A“. Table I, off-state leakage current, 1, 2, and 3 to “1.0 pA“ for group A :%$oups 1 and 2 and “5.0 PA“ for group A subgroup 3. Revision level block; add “A“.

19、 Sheet 8: change maximum limit from “100 VA for group A subgroups 14. THIS SECTION FOR GOVERNMENT USE ONLY I I a. (X one) I X I (1) Existing document supplemented by the NOR may be used in manufacture. (2) Revised document must be received before manufacturer may incorporate this change. H (3) Custo

20、dian of master document shalt make above revision and furnish revised document Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-9999996 0048885 668 L TR APPROVED DESCRIPTION DATE (YR-MO-DA) REV SHEET REV SHEET PMIC NIA 15 16 17 STANDARDIZED MILITARY D

21、RAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE ORM 193 JUL 91 DISTRIBUTION STPTEMENT A. REV I I I SHEET 123 PREPARED BY Joseph A. Kerby CHECKED BY Thomas J. Ricciuti APPROVED BY Honica L. Poelking DRAWING APPROVAL DATE 93-07-02 REVISIW LEVEL DEF

22、ENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 MICROCIRCUIT, DIGITAL, FAST CMOS OCTAL TRANSCEIVER/REGISTER, THREE- STATE OUTPUTS, TTL COMPATIBLE INPUTS AND LIMITED OUTPUT VOLTAGE SWING,MONOLITHIC SILICON SIZE I CAGE CODE I 5962-92246 A 67268 SHEET 1 oc 22 5962-E308-93 Approved for public release;

23、 distribution is unlimited. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-1. SCOPE 1.1 Scope. This drawing forms a part of a one part - one part nhr docentation system (see 6.6 herein). Two product assurance classes consisting of military high reli

24、ability (device classes B, Q, and M) and space application (device classes S and V), and a choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Nunter (PIN). Device class M microcircuits represent non-JAH class B microcircuits in accordance with 1.2.1

25、of MIL-STO-883, “Provisions for the use of MIL-STD-883 in conjunction with conpliant non-JAN devices“. When available, a choice of radiation hardness assurance (RHA) levels are reflected in the PIN. I I I 1 1.2 m. The PIN shall be as shown in the following exanple: 5(, i 92246 7 JI, 1 1 RHA Device D

26、evi ce Case Lead I Federal stock class designator type class outline finish designator (See 1.2.1) (See 1.2.2) designator (See 1.2.4) (See 1.2.5) Ld (See 1.2.3) I/ Drawing nmhr 1.2.1 RHA desiqnator. Device classes M, B, and S RHA marked devices shall meet the MIL-M-38510 specified RHA levels and sha

27、ll be marked with the appropriate RHA designator. Device classes Q and V RHA marked devices shall meet the MIL-1-38535 specified RHA levels and shall be marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. I 1.2.2 Device tyw(s1. The device type(s) shall identify the cir

28、cuit function as follows: Device type Generic nunter Circuit function 01, 04 Octa 1 transceiver/reg i ster , with three-state outputs, TTL cornpat ib le inputs and limited output voltage swing. 02, 05 54FCT652AT Octal transceiver/register, with three-state outputs, TTL conpatible inputs and limited

29、output voltage swing. 03, 06 54FCT652CT Octal transceiver/register, with three-state outputs, TTL conpatible inputs and limited output voltage swing. 54FCT652T 1.2.3 Device class desiqnator. The device class designator shall be a single letter identifying the product assurance level as follows: Devi

30、ce class Device requirements documentation n I Vendor self-certification to the requirements for non-JAW class B microcircuits in accordance with 1.2.1 of MIL-STO-883 I B or S Q or V Certification and qualification to MIL-M-38510 Certification and qualification to MIL-1-38535 1.2.4 Case outline(s1.

31、The case outline(s) shall be as designated in MIL-STO-1835. and as follows: Outline letter Descr i pt i ve des i qnator Termi na 1 S Packaae style K L 3 GFP2-F24 or CDFP3-FZ4 24 flat package GIPl-T24 or CDIP2-T24 24 dual-in-line CQCCl-N28 28 leadless-ch ip-carr ier package 1.2.5 Lead finish. The lea

32、d finish shall be as specified in MIL-M-38510 for classes M. B. and S or MIL-1-38535 for classes Q and V. Finish letter “X“ shall not be marked on the microcircuit or its packaging. The “X“ designation is for use in specifications when lead finishes A, B, and C are considered acceptable and intercha

33、ngeable without preference. STANDARDIZED 5962-92246 MILITARY DIWWING DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 DESC FORM 193A JUL 91 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-b 0048887 430 W 1.3 Absolute maximum ratinqs. iJ J 31 Supp

34、ly voltage range (V ) - - - - - - - - - - - - - - - - - DC input voltage range f6 ,) - - - - - - - - - - - - - - - - DC output voltage range (io T) - - - - - - - - - - - - - - - DC input clamp current (I Ky (V - -0.5 V) - - - - - - - - - DC output clamp current (1 K) (4 = -0.5 V and t7.0 V) - - OC o

35、utput source current (Y p and the absolute value of the magnitude, not the sign, is relative to the minimum and maximm limits, as applicable, listed herein. limits specified in table I at 4.5 V 5 Vcc 4/ This parameter is guaranteed, if not tested, to the limits specified in table I. - 51 Three-state

36、 output conditions are required. - 6/ This test may be performed using V This test is guaranteed by the IILIHand IIH tests. This test is required only for Group A testing, see 4.4.1 herein. Not more than one output should be shorted at a time. one second. Output terminals not designated shall be hig

37、h level logic, low level logic, or open, All devices shall meet or exceed the 5.5 V. = 3.0 V. When VIH = 3.0 V is used, the test is guaranteed for VIH = 2.0 V. The duration of the short circuit test should not exceed I I I DESC FORM 193A JUL 91 Provided by IHSNot for ResaleNo reproduction or network

38、ing permitted without license from IHS-,-,-= 9777776 0048895 507 8 IccD may be verified by the fol lowing equation: ICCT - 1cc - D N AI HT CC CCD = fCp/2 +fiNi where Ica, IFE (fCCb or I device u er listed in the test conditions column for ICCT This test may be performed either one input at a time (p

39、referred method) or with all input pins simultaneously at -2.1 V (alternate method). Classes 6, S, Q, and V shall use the preferred method. When the test is using the alternate test method: the maximum limit is equal to the nunter of inputs at a high TTL input level times 2.0 m4; and the preferred m

40、ethod and limits are guaranteed. For IoFF testing, test each input and output. ICCT is calculated as follows: where in table I), and AI shall be the measured values of these parameters, for the st w en te!?dd as described in tabe I, herein. The values for OH, tiT, fCp, fi, Ni shall be as in table I,

41、 herein. ICCT = ICC DHNTAICC ICCD(fCp/2 +fiNi) Quiescent supply current (any I or ICCH) lCC:Duty cycle for TTL inputs at 3.4bL nH = Number of TTL inputs at 3.4 V fCc - Quiescent supply current delta, TTL inputs at 3.4 V f:FD-=Clock frequency for registered devices (fCp - O for nonregistered devices)

42、 fi = Input frequency Ni = Number of inputs at fi This test is for qualification only. Ground and V bounce tests are performed on a non-switching (quiescent) output and are used to measure the magnitude of inguced noise caused by other simultaneously switching outputs. The test is performed on a low

43、 noise bench test fixture. For the device under test, all outputs shall be loaded with 500 R of load resistance and a minimum of 50 pF of load capacitance (see figure 4). Only chip capacitors and resistors shall be used. The output load components shall be located as close as possible to the device

44、outputs. It is suggested, that whenever possible, this distance be kept to less than .25 inches. Decoupling capacitors shall be placed in parallel from Vcc to ground. The values of these decoupling capacitors shall be determined by the device manufacturer. The low and high level ground and Vcc bounc

45、e noise is measured at the quiet output using a 1 GHz minimum bandwidth oscilloscope with a 500 input impedance. The device inputs shall be conditioned such that all outputs are at a high nominal V shall then be conditioned such that they switch simultaneously and the output under ?est remains at V

46、other outputs possible are switched from VOH to V to the largest negative and positive peaks, respe?kivelgHYsee file 4). This is then repeated with the same outputs not under test switching from VOL to VOH. The device inputs shall be conditioned such that all outputs are at a low nominal V shall the

47、n be conditioned such that they switch similtaneously and the output underohest remains at V as all other outputs possible are switched from VOL to V?!: VOL! and V .8Lv are ) then measured from the nomina? V level to the largest positive and negative peaks, respe ively see fi Ure 4 . This is then re

48、peated with theOkame outputs not under test switching from VOH to VOL. For device types 04 ,O5 and 06, limits will be added when these device types become available from an approved source of supply. Tests shall be performed in sequence, attributes data only. Functional tests shall include the truth

49、 table and other logic patterns used for fault detection. The test vectors used to verify the truth table shall, at a minimum, test all functions of each input and output. All possible input to output logic patterns per function shall be guaranteed, if not tested, to the truth table in figure 2, herein. in sequence as approved by the qualifying activity on qualified devices. H 2 1.5 V, L 1.5 V. AC limits at V Minimum propagggian

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