1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Update boilerplate paragraphs to current MIL-PRF-38535 requirements. - ro 10-03-09 C. SAFFLE REV SHET REV SHET REV STATUS REV A A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY SANDRA ROONEY DEFENSE SUPPLY CEN
2、TER COLUMBUS COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE CHECKED BY SANDRA ROONEY APPROVED BY MICHAEL A. FRYE MICROCIRCUIT, LINEAR, 20 MSPS FLASH A/D CONVERTER, MONOLITHI
3、C SILICON DRAWING APPROVAL DATE 94-05-25 AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-94678 SHEET 1 OF 12 DSCC FORM 2233 APR 97 5962-E208-10 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94678 DEFE
4、NSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines
5、and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 94678 01 M X A Federal stock class designator RHA de
6、signator (see 1.2.1) Device type (see 1.2.2)Device class designatorCase outline (see 1.2.4) Leadfinish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA design
7、ator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Cir
8、cuit function 01 HI5700 8 bit, 20 MSPS flash A/D converter 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883
9、compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package sty
10、le X GDIP1-T28 or CDIP2-T28 28 Dual in line 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICRO
11、CIRCUIT DRAWING SIZE A 5962-94678 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ Supply voltage, VDDto GND . (GND 0.5 V) VDD +7.0 V Analog and reference input pins . (VSS 0.5 V) VINA (VDD+ 0.5 V) Digital I/O pi
12、ns . (GND 0.5 V) VI/O (VDD+ 0.5 V) Power dissipation (PD) at 75C . 2100 mW 2/ Storage temperature range . -65C to +160C Junction temperature (TJ) . +175C Lead temperature (soldering, 10 seconds) +300C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Thermal resistance, junction-to-ambien
13、t (JA) 47C/W 1.4 Recommended operating conditions. Supply voltage 5.0 V Ambient operating temperature range (TA) . -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the ex
14、tent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Meth
15、od Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps
16、.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothi
17、ng in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2
18、/ Derate linearly above TA= +75C at 21 mW/C. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94678 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 3. RE
19、QUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or
20、function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shal
21、l be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outline. The case outline shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1.
22、3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Block diagram. The block diagram shall be as specified on figure 3. 3.2.5 Timing waveforms. The timing waveforms shall be as specified on figure 4. 3.3 Electrical performance characteristics and postirradiation parameter lim
23、its. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full ambient operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgr
24、oups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to sp
25、ace limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with
26、 MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For
27、device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an appr
28、oved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein o
29、r for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits del
30、ivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. Fo
31、r device class M, DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. D
32、evice class M devices covered by this drawing shall be in microcircuit group number 81 (see MIL-PRF-38535, appendix A). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94678 DEFENSE SUPPLY CENTER COLUMBUS COL
33、UMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ -55C TA+125C Group A subgroups Device type Limits Unit unless otherwise specified Min Max Integral linearity error INL FS= 15 MHz, fIN= DC 1 01 2.0 LSB (be
34、st fit method) 2,3 2.65 FS= 20 MHz, fIN= DC 1 2.25 2,3 4.1 Differential linearity error DNL FS= 15 MHz, fIN= DC 1 01 0.9 LSB (guaranteed no missing codes) 2,3 1.0 FS= 20 MHz, fIN= DC 1 0.9 2,3 1.0 Offset error VOS FS= 15 MHz, fIN= DC 1 01 8.0 LSB (adjustable to zero) 2,3 9.5 FS= 20 MHz, fIN= DC 1 8.
35、0 2,3 9.5 Full scale error FSE FS= 15 MHz, fIN= DC 1 01 4.5 LSB (adjustable to zero) 2,3 8.0 FS= 20 MHz, fIN= DC 1 4.5 2,3 8.0 Analog input resistance RINVIN= 4 V 1,2,3 01 4 M Analog input bias current IBVIN= 0 V, 4 V 1,2,3 01 1.0 A Total reference resistance RL1 01 250 2,3 235Digital input high vol
36、tage VIH1,2,3 01 2.0 V Digital input low voltage VIL1,2,3 01 0.8Digital logic input current IINVIN= 0 V, +5 V 1,2,3 01 1.0 A Digital output leakage current IOZCE2 = 0 V, VO= 0 V, 5 V 1,2,3 01 1.0 A See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted wi
37、thout license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94678 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Conditions 1/ -55C TA+125C Group A subgroups Devic
38、e type Limits Unit unless otherwise specified Min Max Digital output logic source current IOHVO= 4.5 V 1,2,3 01 -3.2 mA Digital output logic sink current IOLVO= 0.4 V 1,2,3 01 3.2 mA Offset error PSRR VOS VDD= 5 V 10% 1 01 2.75 LSB 2,3 5.5 Gain error PSRR FSE VDD= 5 V 10% 1 01 2.75 LSB 2,3 5.5 Suppl
39、y current IDDFS= 20 MHz 1 01 180 mA 2,3 190Maximum conversion rate No missing codes 9,10,11 01 20 MSPS Data output enable time tENSee figure 4 9 01 25 ns 10,11 30 Data output disable time tDISSee figure 4 9 01 20 ns 10,11 25 Data output delay tODSee figure 4 9 01 25 ns 10,11 30 Data output hold tHSe
40、e figure 4 9 01 10 ns 10,11 5 1/ AVDD= VDD= +5.0 V. VREF+= +4.0 V. VREF-= GND = AGND = 0 V. FS= specified clock frequency at 50% duty cycle. CL= 30 pF. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94678 DE
41、FENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 7 DSCC FORM 2234 APR 97 Device type 01 Case outline X Terminal number Terminal symbol 1CLK2 D7 364 D5 546 1/4R 7 VDD8 GND 9 3/4R 10 D3 2 12 D1 CE1 CE2 D0 D7 OVF 13 D0 0 1 Valid Valid 14 OVF 1 1 Three state Valid15 CE2 X 0
42、Three state Three state 16 CE1 FIGURE 2. Truth table. 17 VREF+18 AVDD19 AGND 20 AGND 21 AVDD22 1/2R 23 AVDD24 AGND 25 AGND 26 AVDD27 VREF-28 VINFIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAW
43、ING SIZE A 5962-94678 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 8 DSCC FORM 2234 APR 97 FIGURE 3. Block diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94678 DEF
44、ENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 9 DSCC FORM 2234 APR 97 FIGURE 4. Timing waveforms. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94678 DEFENSE SUPPLY CENTER COL
45、UMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 10 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with MIL-PRF-38535 or as modified in the device manufacturers Quality Management (QM) pla
46、n. The modification in the QM plan shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-3
47、8535, and shall be conducted on all devices prior to qualification and technology conformance inspection. For device class M, screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. 4.2.1 Additional criteria for
48、 device class M. a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-
