1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Redraw. Update drawing to current requirements. drw 09-09-09 Charles F. Saffle REV SHET REV A A A SHEET 15 16 17 REV STATUS REV A A A A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Rick Officer DEFENSE
2、 SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE CHECKED BY Rajesh Pithadia APPROVED BY Michael Frye MICROCIRCUIT, LINEAR, 135 MHz TRIPLE 8-BIT D/A CON
3、VERTERS WITH 256 WORD COLOR PALLETTE RAM, MONOLITHIC SILICON DRAWING APPROVAL DATE 94-11-21 AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-94748 SHEET 1 OF 17 DSCC FORM 2233 APR 97 5962-E459-09 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-S
4、TANDARD MICROCIRCUIT DRAWING SIZE A 5962-94748 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space appli
5、cation (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 9
6、4748 01 M X C Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2)Device class designatorCase outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA l
7、evels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type. The device type identifies the circuit fun
8、ction as follows: Device type Generic number Circuit function 01 TLC34076 135 MHz triple 8-bit D/A converters with 256 word color palette RAM 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirem
9、ents documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline. The case outline is as designated in MIL-STD-1835
10、 as follows: Outline letter Descriptive designator Terminals Package style X CMGA16-P84 84 Grid array 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networ
11、king permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94748 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ 2/ Supply voltage . 7 V Input voltage range (VIN) -0.5 V to VDD+0.5 V A
12、nalog output short-circuit duration to any power supply or common unlimited Power dissipation (PD) . 2.675 W Storage temperature range -65C to +150C Junction temperature (TJ) . +175C Case temperature for 10 seconds +260C Lead temperature 1.6 mm (1/16 inch) from case for 10 seconds +260C Thermal resi
13、stance, junction-to-case (JC) . 10C/W Thermal resistance, junction-to-ambient (JA) 25C/W 1.4 Recommended operating conditions. Supply voltage (VDD) 4.75 V to 5.25 V Reference voltage (VREF) . 1.2 V to 1.26 V High-level TTL input voltage (VIH) 2.4 V to VDD+ 0.5 V Low-level TTL input voltage (VIL) . 0
14、.8 V Differential input voltage (VID) ECL inputs 0.6 V to 6 V Common-mode input voltage (VIC) ECL inputs 2.85 V to VDD- 0.5 V Ambient operating temperature (TA) -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and h
15、andbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMEN
16、T OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these docume
17、nts are available online at http:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the
18、 text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may
19、degrade performance and affect reliability. 2/ All voltage values are with respect to the GND terminal. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94748 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 4321
20、8-3990 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modi
21、fication in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensi
22、ons. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outline. The case outline shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. T
23、he terminal connections shall be as specified on figure 1. 3.2.3 Logic diagram. The logic diagram shall be as specified on figure 2. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and post
24、irradiation parameter limits are as specified in table I and shall apply over the full ambient operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I.
25、3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device.
26、For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for
27、 device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 list
28、ed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance sub
29、mitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certifi
30、cate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M,
31、notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the option to review
32、 the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 56 (see
33、 MIL-PRF-38535, appendix A).Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94748 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical pe
34、rformance characteristics. Test Symbol Conditions -55C TA+125C VDD= 5 V Group A subgroups Device type Limits 1/ Unit unless otherwise specified Min Max High level output voltage VOHVDD= 4.75 V, IOH= -800 A 1, 2, 3 01 2.4 V Low level output voltage VOLVDD= 4.75 V, IOL= 3.2 mA, D, MUXOUT , VCLK1, 2, 3
35、 01 0.4 V VDD= 4.75 V, IOL= 15 mA, HSYNCOUT, VSYNCOUT 0.4 VDD= 4.75 V, IOL= 18 mA, SCLK 0.4 High level input current IIHVDD= 5.25 V, VI= 2.4 V, TTL inputs 1, 2, 3 01 10 A VDD= 5.25 V, VI= 4 V, ECL inputs 10 Low level input current IILVDD= 5.25 V, VI= 0.8 V, TTL inputs 1, 2, 3 01 -10 A VDD= 5.25 V, V
36、I= 0.8 V, ECL inputs -10 Supply current, pseudo-color mode IDDVDD= 5 V 2/ 1, 2, 3 01 535 mA Supply current, true-color mode IDDVDD= 5 V 2/ 1, 2, 3 01 475 mA High impedance state output current IOZVDD= 5.25 V 1, 2, 3 01 25 A End point linearity error (each DAC) EL68/ high 4, 5, 6 01 1 LSB 68/ low 0.2
37、5 Differential linearity error (each DAC) ED68/ high 4, 5, 6 01 1 LSB 68/ low 0.25 Gray scale error GSE 4, 5, 6 01 5 % See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94748 DEFE
38、NSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - continued. Test Symbol Conditions -55C TA+125C VDD= 5 V Group A subgroups Device type Limits 1/ Unit unless otherwise specified Min Max Output current
39、 3/ IOWhite level relative to blank 1, 2, 3 01 17.69 20.4 mA White level relative to black (7.5 IRE only) 16.74 18.5 Black level relative to blank (7.5 IRE only) 0.95 1.9 Blank level on IOR, IOB -50 50 A Blank level on IOG (with SYNC enabled) 6.29 8.96 mA SYNC level on IOG (with SYNC enabled) -50 50
40、 A DAC to DAC matching DDM4, 5, 6 01 5 % Output compliance VOC1, 2, 3 01 -0.4 1.2 V Voltage reference output voltage VREF1, 2, 3 01 1.1 1.3 V Pipeline delay PLD Normal mode 4, 5, 6 01 1 SCLK + 9 dot clock periodsVGA pass through mode 7.5 dot clock DOT-clock frequency fDC 4, 5, 6 01 135 MHz CLKO freq
41、uency for VGA pass through mode fCLKO4, 5, 6 01 85 MHz Clock cycle time tCYCTTL, ECL, see figure 3 9, 10, 11 01 7.4 ns Setup time, RS valid before RD or WR tSU1See figure 3 9, 10, 11 01 10 ns Hold time, RS valid after RD or WR tH1See figure 3 9, 10, 11 01 10 ns Setup time, D valid before WR tSU2See
42、figure 3 9, 10, 11 01 35 ns Hold time, D valid after WR tH2See figure 3 9, 10, 11 01 0 ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94748 DEFENSE SUPPLY CENTER COLUMBUS CO
43、LUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - continued. Test Symbol Conditions -55C TA+125C VDD= 5 V Group A subgroups Device type Limits 1/ Unit unless otherwise specified Min Max Setup time, VGA and HSYNC , VSYNC and VGABL
44、ANK valid before CLKO tSU3See figure 3 9, 10, 11 01 2 ns Hold time, VGA and HSYNC , VSYNC and VGABLANK valid after CLKO tH3See figure 3 9, 10, 11 01 2 ns Setup time, P valid before SCLK tSU4See figure 3 9, 10, 11 01 0 ns Hold time, P valid after SCLK tH4See figure 3 9, 10, 11 01 8 ns Setup time, HSY
45、NC , VSYNC and BLANK valid before VCLK tSU5See figure 3 9, 10, 11 01 5 ns Hold time, HSYNC , VSYNC and BLANK valid after VCLK tH5See figure 3 9, 10, 11 01 2 ns Pulse duration, RD or WR low tW1See figure 3 9, 10, 11 01 50 ns Pulse duration, RD or WR high tW2See figure 3 9, 10, 11 01 30 ns SCLK freque
46、ncy fSCLK4/ 9, 10, 11 01 85 MHz VCLK frequency fVCLK9, 10, 11 01 85 MHz Enable time, RD low to D valid tEN1See figure 3 9, 10, 11 01 40 ns Disable time, RD low to D disabled tDIS1See figure 3 9, 10, 11 01 17 ns Valid time, D valid after RD high tV1See figure 3 9, 10, 11 01 2 ns Propagation delay, SF
47、LAF/NFLAG to SCLK high tPLH1 See figure 3 5/ 9, 10, 11 01 0 20 ns Delay time, RD low to D starting to turn on tD1See figure 3 9, 10, 11 01 5 ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWI
48、NG SIZE A 5962-94748 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 8 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - continued. Test Symbol Conditions -55C TA+125C VDD= 5 V Group A subgroups Device type Limits 1/ Unit unless otherwise specified Min Max Delay time, VCLK high/low to SCLK high/low tD4See figure 3 6/ 9, 10, 11 01 0 5 ns Analog output settling time tD7See figure 3 7/ 9, 10, 11 01 12 ns Pulse duration, SCLK high tW6See figu
