1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Redraw. Update drawing to current requirements. drw 10-02-18 Charles F. Saffle REV SHET REV SHET REV STATUS REV A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 PMIC N/A PREPARED BY Rick C. Officer DEFENSE SUPPLY CENTER COLUMBUS COLU
2、MBUS, OHIO 43218-3990 http:/www.dscc.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE CHECKED BY Rajesh Pithadia APPROVED BY Michael A. Frye MICROCIRCUIT, LINEAR, ANALOG-TO-DIGITAL CONVERTER WITH S/H FUNCTION AND INP
3、UT MULTIPLEXER, MONOLITHIC SILICON DRAWING APPROVAL DATE 96-01-10 AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-95514 SHEET 1 OF 11 DSCC FORM 2233 APR 97 5962-E201-10 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWI
4、NG SIZE A 5962-95514 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A
5、 choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 95514 01 Q R A Federal stoc
6、k class designator RHA designator (see 1.2.1) Device type (see 1.2.2)Device class designatorCase outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with
7、the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type. The device type identifies the circuit function as follows: Device t
8、ype Generic number Circuit function 01 ADC08061 A/D converter with S/H function and Input multiplexer 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certifi
9、cation to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline. The case outline is as designated in MIL-STD-1835 and as follows: Outline letter Descript
10、ive designator Terminals Package style R GDIP1-T20 or CDIP2-T20 20 Dual-in-line 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without
11、 license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-95514 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/, 2/ Supply voltage (+VS) 6 V Logical control inputs . -0.3 V to +VS+ 0.3 V Voltage at other i
12、nputs and outputs -0.3 V to +VS+ 0.3 V Input current at any pin 5 mA 3/ Package input current 20 mA 3/ Power dissipation (PD) . 875 mW Junction temperature (TJ) . +150C Lead temperature (soldering, 10 seconds) . +300C Storage temperature range -65C to +150C Thermal resistance, junction-to-case (JC)
13、. 9C/W Thermal resistance, junction-to-ambient (JA) 74C/W 43C/W 500 LFPM 1.4 Recommended operating conditions. Supply voltage (+VS) +4.5 V to +5.5 V Ambient operating temperature range (TA) -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following sp
14、ecification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General
15、 Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Draw
16、ings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and th
17、e references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operat
18、ion at the maximum levels may degrade performance and affect reliability. 2/ All voltages are measured with respect to GND, unless otherwise noted. 3/ When the input voltage (VIN) at any pin exceeds the power supply voltage (VIN+VS), the absolute value of the current at that pin should be limited to
19、 5 mA or less. The 20 mA package input current specification limits the number of pins that can exceed the power supply boundaries with a 5 mA current limit to four. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A
20、 5962-95514 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in t
21、he device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as sp
22、ecified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outline. The case outline shall be
23、in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation
24、parameter limits are as specified in table I and shall apply over the full ambient operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking.
25、 The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA prod
26、uct using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device clas
27、ses Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufactu
28、rer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DS
29、CC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conf
30、ormance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification
31、 to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufac
32、turers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 57 (see MIL-PRF-385
33、35, appendix A). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-95514 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance c
34、haracteristics. Test Symbol Conditions 1/ -55C TA+125C Group A subgroups Device type Limits Unit unless otherwise specified Min Max CONVERTER CHARACTERISTICS Positive reference input voltage +VREF1, 2, 3 01 -VREF+VSV Negative reference input voltage -VREF1, 2, 3 01 GND +VREFV Analog input voltage VI
35、N2/ 1, 2, 3 01 GND -0.1 +VS+0.1 V Analog input leakage current 3/ IINOn channel input = 5 V, Off channel input = 0 V 1, 2, 3 01 -20 A On channel input = 0 V, Off channel input = 5 V -20 Power supply sensitivity PSS +VS= 5 V 5%, VREF= 4.75 V, all codes tested 1, 2, 3 01 3/4 LSB Reference resistance R
36、REF4, 5, 6 01 500 1250 DC ELECTRICAL CHARACTERISTICS Logic 1 input voltage VIH+VS= 5.5 V at CS , WR /RDY, A0-A2, RD pins 1, 2, 3 01 2.0 V +VS= 5.5 V at MODE pin 3.5 Logic 0 input voltage VIL+VS= 4.5 V at CS , WR /RDY, A0-A2, RD pins 1, 2, 3 01 0.8 V +VS= 4.5 V at MODE pin 1.5 Logic 1 input current I
37、IHVIH= 5 V at CS , RD , A0-A2 pins 1, 2, 3 01 1 A VIH= 5 V at WR /RDY pin 3 IH= 5 V at MODE pin 200 Logic 0 input current IILVIL= 0 V at MODE, A0-A2, CS , WR /RDY pins 1, 2, 3 01 -2 A Logic 1 output voltage VOH+VS= 4.75 V, IOUT= -360 A, DB0-DB7, OFL , INT pins 1, 2, 3 01 2.4 V IOUT= -10 A, DB0-DB7,
38、OFL , INT pins 4.5 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-95514 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 6 DSCC FORM 2234 APR 97
39、TABLE I. Electrical performance characteristics - continued. Test Symbol Conditions 1/ -55C TA+125C Group A subgroups Device type Limits Unit unless otherwise specified Min Max DC ELECTRICAL CHARACTERISTICS - continued Logic 0 output voltage VOL+VS= 4.75 V, IOUT= 1.6 mA, WR /RDY, DB0-DB7, OFL , INT
40、pins 1, 2, 3 01 0.4 V Three-state output current IOUTVOUT= 5 V, DB0-DB7, WR /RDY pins 1, 2, 3 01 3 A VOUT= 0 V, DB0-DB7, WR /RDY pins -3 Output source current ISCVOUT= 0 V, DB0-DB7, OFL , INT pins 1, 2, 3 01 -6 mA Output sink current ISKVOUT= 5 V, DB0-DB7, OFL , INT , WR /RDY pins 1, 2, 3 01 7 mA Po
41、wer supply current ICCCS = WR /RDY = RD = 0 1, 2, 3 01 20 mA AC ELECTRICAL CHARACTERISTICS RD mode conversion time tCRDMODE pin to GND 9, 10, 11 01 900 ns Access time, delay from falling edge of RD to output valid tACCOCL 100 pF, MODE pin to GND 9, 10, 11 01 900 ns Conversion time, WR /RDY, RD pin t
42、CONVMODE pin to +VS9, 10, 11 01 790 ns Write time tWRMODE pin to +VS9, 10, 11 01 100 ns Read time, time from falling edge of WR /RDY to falling edge of RD tRDMODE pin to +VS9, 10, 11 01 515 ns RD width tRDWMODE pin to GND 9, 10, 11 01 250 400 ns Access time, delay from falling edge of RD to output v
43、alid tACC1CL= 100 pF, MODE pin to +VS, tRD tINTL9, 10, 11 01 175 ns tACC2CL= 100 pF, tRD tINTL60 Three-state control delay, from rising edge of RD high impedance state t1H, t0HCL= 10 pF, RL= 3 k 9, 10, 11 01 55 ns See footnotes at end of table.Provided by IHSNot for ResaleNo reproduction or networki
44、ng permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-95514 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - continued. Test Symbol Conditions 1/ -55C TA+125C Group
45、A subgroups Device type Limits Unit unless otherwise specified Min Max AC ELECTRICAL CHARACTERISTICS - continued Delay from rising edge of WR /RDY to falling edge INT tINTLCL= 50 pF, MODE pin = +VS9, 10, 11 01 690 ns Delay from rising edge of RD to rising edge INT tINTHCL= 50 pF 9, 10, 11 01 100 ns
46、Delay from rising edge of WR /RDY to rising edge INT tINTHCL= 50 pF 9, 10, 11 01 100 ns Delay from CS to WR /RDY tRDYCL= 50 pF, RL= 3 k, MODE pin = 0 V 9, 10, 11 01 50 ns Delay from INT to output valid tIDCL= 100 pF, RL= 3 k 9, 10,11 01 15 ns Delay from RD to INT tRIMODE pin = +VS, tRD tINTL9, 10, 1
47、1 01 175 ns Time between end of RD and start of new conversion tN9, 10, 11 01 50 ns Channel address hold time tAH9, 10, 11 01 60 ns Channel address setup time tAS9, 10, 11 01 0 ns CS setup time tCSS9, 10, 11 01 0 ns CS hold time tCSH9, 10, 11 01 0 ns 1/ +VS= 5 V, +VREF= 5 V, -VREF= GND for DC parame
48、ters. +VS= 5 V, tR= tF= 10 pF, +VREF= 5 V, -VREF= 0 V for AC parameters. 2/ Two on-chip diodes are tied to each analog input and are reversed biased during normal operation. One is connected to +VSand the other is connected to GND. They will become forward biased and conduct when an analog input voltage is equal to or greater than one diode drop above +VSor below GND. Therefore, caution should be exercised when testing with +VS= 4.5 V. Analog inputs with magnitudes equal to 5 V can cause an input diode to conduct, especially
