1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Update drawing to the current requirements of MIL-PRF-38534. 05-08-15 Raymond Monnin B Updated drawing paragraphs. -sld 11-07-13 Charles F. Saffle REV SHEET REV B SHEET 15 REV STATUS REV B B B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8
2、 9 10 11 12 13 14 PMIC N/A PREPARED BY Steve L. Duncan DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil/ STANDARD MICROCIRCUIT DRAWING CHECKED BY Michael Jones THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE APPROVED BY Kendall A.
3、Cottongim MICROCIRCUIT, HYBRID, ELECTRICALLY ERASABLE PROGRAMMABLE READ ONLY MEMORY, 128K X 16-BIT DRAWING APPROVAL DATE 97-04-15 AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-96689 SHEET 1 OF 15 DSCC FORM 2233 APR 97 5962-E369-11 Provided by IHSNot for ResaleNo reproduction or networking pe
4、rmitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96689 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents five product assurance classes as defined in paragraph 1.2.3 and MIL-PRF-3853
5、4. A choice of case outlines and lead finishes which are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of radiation hardness assurance levels are reflected in the PIN. 1.2 PIN. The PIN shall be as shown in the following example: 5962 - 96689 01 H X X F
6、ederal RHA Device Device Case Lead stock class designator type class outline finish designator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 Radiation hardness assurance (RHA) designator. RHA marked devices shall meet the MIL-PRF-38534 specified RHA
7、levels and shall be marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function Access time 01 WE128K16-300CQ EEPROM, 128K X 16-bit 300 ns 02 WE128K16
8、-250CQ EEPROM, 128K X 16-bit 250 ns 03 WE128K16-200CQ EEPROM, 128K X 16-bit 200 ns 04 WE128K16-150CQ EEPROM, 128K X 16-bit 150 ns 1.2.3 Device class designator. This device class designator shall be a single letter identifying the product assurance level. All levels are defined by the requirements o
9、f MIL-PRF-38534 and require QML Certification as well as qualification (Class H, K, and E) or QML Listing (Class G and D). The product assurance levels are as follows: Device class Device performance documentation K Highest reliability class available. This level is intended for use in space applica
10、tions. H Standard military quality class level. This level is intended for use in applications where non-space high reliability devices are required. G Reduced testing version of the standard military quality class. This level uses the Class H screening and In-Process Inspections with a possible lim
11、ited temperature range, manufacturer specified incoming flow, and the manufacturer guarantees (but may not test) periodic and conformance inspections (Group A, B, C, and D). E Designates devices which are based upon one of the other classes (K, H, or G) with exception(s) taken to the requirements of
12、 that class. These exception(s) must be specified in the device acquisition document; therefore the acquisition document should be reviewed to ensure that the exception(s) taken will not adversely affect system performance. D Manufacturer specified quality class. Quality level is defined by the manu
13、facturers internal, QML certified flow. This product may have a limited temperature range. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96689 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL
14、B SHEET 3 DSCC FORM 2234 APR 97 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X See figure 1 40 Co-fired ceramic DIP 1.2.5 Lead finish. The lead finish shall be as specified in MIL-PRF-38534.
15、 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) -0.6 V dc to +6.25 V dc Signal voltage range (VG) -0.6 V dc to +6.25 V dc Power dissipation (PD) . 1.4 W Max. Storage temperature range -65C to +150C Lead temperature (soldering, 10 seconds) +300C Data retention 10 years minimum Endurance
16、(write/erase cycles) 10,000 cycles minimum Voltage on OE and A9 . -0.6 V dc to +13.5 V dc 1.4 Recommended operating conditions. Supply voltage range (VCC) . +4.5 V dc to +5.5 V dc Input low voltage range (VIL) . -0.3 V dc to +0.8 V dc Input high voltage range (VIH) +2.0 V dc to VCC+ 0.3 V dc Case op
17、erating temperature range (TC) -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are
18、 those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38534 - Hybrid Microcircuits, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard for Electronic Component Case Outline
19、s. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Buil
20、ding 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exem
21、ption has been obtained. 1/ Stresses above the absolute maximum ratings may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,
22、-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96689 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item performance requirements for device classes D, E, G, H, and K shall be in accordance with MIL-PRF
23、-38534. Compliance with MIL-PRF-38534 may include the performance of all tests herein or as designated in the device manufacturers Quality Management (QM) plan or as designated for the applicable device class. The manufacturer may eliminate, modify or optimize the tests and inspections herein, howev
24、er the performance requirements as defined in MIL-PRF-38534 shall be met for the applicable device class. In addition, the modification in the QM plan shall not affect the form, fit, or function of the device for the applicable device class. 3.2 Design, construction, and physical dimensions. The des
25、ign, construction, and physical dimensions shall be as specified in MIL-PRF-38534 and herein. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.4 herein and figure 1. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2. 3.2.3 Truth table(s)
26、. The truth table(s) shall be as specified on figure 3. 3.2.4 Timing diagram(s). The timing diagram(s) shall be as specified on figures 4, 5, 6, and 7. 3.2.5 Block diagram(s). The block diagram(s) shall be as specified on figure 8. 3.2.6 Output load circuit. The output load circuit shall be as speci
27、fied on figure 9. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full specified operating temperature range. 3.4 Electrical test requirements. The electrical test requireme
28、nts shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Programming procedure. The programming procedure shall be as specified by the manufacturer and shall be available upon request. 3.6 Marking of device(s). Marking of device(s) shall be
29、 in accordance with MIL-PRF-38534. The device shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers vendor similar PIN may also be marked. 3.7 Data. In addition to the general performance requirements of MIL-PRF-38534, the manufacturer of the device described herein shall
30、 maintain the electrical test data (variables format) from the initial quality conformance inspection group A lot sample, for each device type listed herein. Also, the data should include a summary of all parameters manually tested, and for those which, if any, are guaranteed. This data shall be mai
31、ntained under document revision level control by the manufacturer and be made available to the preparing activity (DLA Land and Maritime -VA) upon request. 3.8 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to supply to this drawing. The certifi
32、cate of compliance (original copy) submitted to DLA Land and Maritime -VA shall affirm that the manufacturers product meets the performance requirements of MIL-PRF-38534 and herein. 3.9 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38534 shall be provided with each
33、lot of microcircuits delivered to this drawing. 3.10 Endurance. A reprogrammability test shall be completed as part of the vendors reliability monitors. This reprogrammability test shall be done for the initial characterization and after design process changes which may affect the reprogrammability
34、of the device. The methods and procedures may be vendor specific, but shall guarantee the number of program/erase cycles listed in section 1.3 herein over the full military temperature range. The vendors procedure shall be kept under document control and shall be made available upon request of the a
35、cquiring or preparing activity. 3.11 Data retention. A data retention stress test shall be completed as part of the vendors reliability monitors. This test shall be done for initial characterization and after any design process change which may affect data retention. The methods and procedures may b
36、e vendor specific, but shall guarantee the number of years listed in section 1.3 herein over the full military temperature range. The vendors procedure shall be kept under document control and shall be made available upon request of the acquiring or preparing activity. Provided by IHSNot for ResaleN
37、o reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96689 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ 2/ -55C TC+125
38、C unless otherwise specified Group A subgroups Device type Limits Unit Min Max DC parameters Input leakage current ILIVCC= 5.5 V dc, VIN= GND or VCC1,2,3 All 10 A Output leakage current ILOCS = VIH, OE = VIH, VOUT= GND or VCC1,2,3 All 10 A Supply current ICCCS = VIL, OE = VIH, f = 5 MHz, VCC= 5.5 V
39、dc 1,2,3 All 125 mA Standby current ISB CS = VIHOE = VIH, f = 5 MHz, VCC= 5.5 V dc 1,2,3 All 1.2 mA Input low level VIL1,2,3 All 0.8 V Input high level VIH1,2,3 All 2.0 V Output low voltage VOLVCC= 4.5 V, IOL= 2.1 mA, 1,2,3 All 0.45 V Output high voltage VOHVCC= 4.5 V, IOL= -400 A 1,2,3 All 2.4 V Dy
40、namic characteristics Input capacitance CINVI/O= 0 V, f = 1.0 MHz TA= +25C 4 All 50 pF Output capacitance COUTVIN= 0 V, f = 1.0 MHz TA= +25C 4 All 40 pF Functional testing Functional tests See 4.3.1c 7,8A,8B All See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networkin
41、g permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96689 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions 1/ 2/ -55C TC+125C unless otherw
42、ise specified Group A subgroups Device type Limits Unit Min Max Read cycle AC timing characteristics Read cycle time tRCSee figure 4. 9,10,11 01 02 03 04 300 250 200 150 ns Address access time tACCSee figure 4. 9,10,11 01 02 03 04 300 250 200 150 ns Chip select access time tACSSee figure 4. 9,10,11
43、01 02 03 04 300 250 200 150 ns Output enable to output valid tOESee figure 4. 9,10,11 01 02 03,04 120 100 85 ns Chip select to output in high Z tDFSee figure 4. 9,10,11 All 70 ns Output enable high to output in high Z tDFSee figure 4. 9,10,11 All 70 ns Output hold from Address change, OE or CS, whic
44、hever is first tOHSee figure 4. 9,10,11 All 0 ns Write AC timing characteristics Write Cycle time tWCSee figure 5. 9,10,11 All 10 ms Address setup time tASSee figure 5. 9,10,11 All 10 ns Write Pulse Width (WE or CS) tWPSee figure 5. 9,10,11 All 150 ns Address hold time tAHSee figure 5. 9,10,11 All 1
45、00 ns Data hold time tDHSee figure 5. 9,10,11 All 10 ns Chip select hold time tCHSee figure 5. 9,10,11 All 0 ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96689 DLA LAND AN
46、D MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions 1/ 2/ -55C TC+125C unless otherwise specified Group A subgroups Device type Limits Unit Min Max Write AC timing characteristics - Co
47、ntinued. Data setup time tDSSee figure 5. 9,10,11 All 100 ns Output enable setup time tOESSee figure 5. 9,10,11 All 4 ns Output enable hold time tOEHSee figure 5. 9,10,11 All 10 ns Write pulse width high tWPHSee figure 5. 9,10,11 All 50 ns Page mode write AC characteristics Write cycle time tWCSee f
48、igure 6. 9,10,11 All 10 ms Data setup time tDSSee figure 6. 9,10,11 All 100 ns Data hold time tDHSee figure 6. 9,10,11 All 10 ns Write pulse width tWPSee figure 6. 9,10,11 All 150 ns Byte load cycle time tBLCSee figure 6. 9,10,11 All 150 s Write pulse width high tWPHSee figure 6. 9,10,11 All 50 ns Data polling AC timing characteristics Data hold time tDHSee figure 7. 9,10,11 All 10 ns Output enable hold time tOEHSee figure 7. 9,10,11 All 10 ns Output enable to output de
