DLA SMD-5962-96744 REV A-1999 MICROCIRCUIT DIGITAL 3 3-V DIGITAL SIGNAL PROCESSOR 32-BIT MONOLITHIC SILICON《3 3伏特数字信号处理器32-BIT数字的硅单片电路微电路》.pdf

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1、LTR A I Editorial changes to table I BI and changes to case outlines X and Y. - tmh I 99-11-24 I Monica L. Poelking DESCRIPTION DATE (YR-MO-DA) APPROVED PMIC NIA STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE I I I I PREPA

2、REDBY Thanh V. Nguyen DEFENSE SUPPLY CENTER COLUMBUS CHECKED BY COLUMBUS, OHIO 43216 Thanh V. Nguyen APPROVEDBY MICROCIRCUIT, DIGITAL, 3.3-V DIGITAL SIGNAL PROCESSOR, 32-BIT, MONOLITHIC SILICON Monica L. Poelking DRAWING APPROVAL DATE 99-04-07 AMSC NIA REVISION LEVEL A I 5962-96744 CAGE CODE I “a I

3、67268 I 1 OF 55 I SHEET DSCC FORM 2233 APR 97 DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited 5962-E058-00 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-1. SCOPE REVISION LEVEL 1 .I Scope. This drawing documents two

4、 product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assuranc

5、e (RHA) levels are reflected in the PIN. SHEET 2 1.2 m. The PIN is as shown in the following example: f Federal RHA Device Device Case Lead stock class designator type class outline finish designator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) I (see 1.2.3) V Drawing number 1.2.1 RHA

6、desiqnator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (

7、-) indicates a non-RHA device. 1.2.2 Device tvpels). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function o1 02 21 062L 21 060L 3.3-V digital signal processor, 32-bit, 2 Mbit SRAM 3.3-V digital signal processor, 32-bit, 4 Mbit SRAM 1.2.3 Device cla

8、ss desiqnator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-3

9、8535, appendix A QorV Certification and qualification to MIL-PRF-38535 1.2.4 Case outlinels). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive desiqnator Terminals Packaqe style See figure 1 See figure 1 See figure 1 See figure 1 240 Gull wing flatpack

10、 cavity down heat sink 240 Gull wing flatpack cavity up heat sink 240 Flatpack with non-conductive tie-bar cavity down heat sink 240 Flatpack with non-conductive tie-bar cavity up heat sink 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-3853

11、5, appendix A for device class M. STAN DARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 I 5962-96744 DSCC FORM 2234 APR 97 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-1.3 Absolute maximum ratincrs. 1/ REVISION LE

12、VEL Supply voltage range (VDD) Input voltage range (VIN) . Output voltage range (VOUT) . Load capacitance . Lead temperature (soldering, 5 seconds) . Storage temperature range (TSTG) . Maximum power dissipation (PD) Thermal resistance junction-to-case (OJC): Cases X,Y, T, and U . SHEET 3 -0.3 V dc t

13、o +4.6 V dc -0.3 V dc to VDD + 0.3 V dc -0.3 V dc to VDD + 0.3 V dc 200 pF +280“C -65C to +I 50C 5w 0.24“C/W 1.4 Recommended oi3eratina conditions. Supply voltage range (VDD) . +3.13 V dc to +3.47 V dc Case operating temperature range (TC) -55C to +125“C 1.5 Dicrital locric testincr for device class

14、es Q and V. Fault coverage measurement of manufacturing logic tests (MIL-STD-883, test method 5012) . XX percent 2/ 2. APPLICABLE DOCUMENTS 2.1 Government si3ecification. standards. and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specifi

15、ed herein. Unless otherwise specified, the issues of these documents are those listed in the issue of the Department of Defense Index of Specifications and Standards (DoDISS) and supplement thereto, cited in the solicitation. SPECIFICATION DEPARTMENTOFDEFENSE MIL-PRF-38535 - Integrated Circuits, Man

16、ufacturing, General Specification for. STANDARDS DEPARTMENTOFDEFENSE MIL-STD-883 - Test Methods and Procedures for Microelectronics. MIL-STD-973 - Configuration Management. MIL-STD-1835 - Interface Standard For Microcircuit Case Outlines. HANDBOOKS DEPARTMENTOFDEFENSE MIL-HDBK-103 - MIL-HDBK-780 - S

17、tandard Microcircuit Drawings. List of Standard Microcircuit Drawings (SMDs). (Unless otherwise indicated, copies of the specification, standards, and handbooks are available from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 191 11 -5094.) - I/ Stress ab

18、ove the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. - 2/ Values are not available. STAN DARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 I 5962-96744 DSCC

19、FORM 2234 APR 97 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of the documents which are

20、 DOD adopted are those listed in the issue of the DODISS cited in the solicitation. Unless otherwise specified, the issues of documents not listed in the DODISS are the issues of the documents cited in the solicitation. REVISION LEVEL INSTITUTE OF ELECTRICAL AND ELECTRONICS ENGINEERS (IEEE) SHEET 4

21、IEEE Standard 1149.1 - IEEE Standard Test Access Port and Boundary Scan Architecture. (Applications for copies should be addressed to the Institute of Electrical and Electronics Engineers, 445 Hoes Lane, Piscataway, NJ 08854-41 50.) (Non-Government standards and other publications are normally avail

22、able from the organizations that prepare or distribute the documents. These documents may also be available in or through libraries or other informational services.) 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this

23、 drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as

24、specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non

25、-JAN class level B devices and as specified herein. 3.2 Desiqn, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case

26、 outlines. The case outlines shall be in accordance with 1.2.4 and figure 1 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2. 3.2.3 Block diaqram. The block diagram shall be as specified on figure 3. 3.2.4 Boundary scan instruction codes. The boundary sc

27、an instruction codes shall be as specified on figure 4. 3.2.5 Timinq waveforms. The timing waveforms shall be as specified on figure 5. 3.2.6 Radiation exposure circuit. The radiation exposure circuit shall be as specified when available. 3.3 Electrical performance characteristics and postirradiatio

28、n parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall

29、be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Markinq. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked as listed in MIL-HDBK-103. For packages where marking of the entire SM

30、D PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for devi

31、ce class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix

32、A. STAN DARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 I 5962-96744 DSCC FORM 2234 APR 97 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-3.6 Certificate of compliance. For device classes Q and V, a certificate of

33、compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (se

34、e 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of

35、 MIL-PRF-38535, appendix A and herein. REVISION LEVEL 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. SH

36、EET 5 3.8 Notification of chancre for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change as defined in MIL-STD-973. 3.9 Verification and review for device class M. For device class M,

37、 DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit qroup assiqnment for device class M. Device class M dev

38、ices covered by this drawing shall be in microcircuit group number 132 (see MIL-PRF-38535, appendix A). 3.1 1 IEEE 1149.1 compliance. Theses devices shall be compliant to IEEE 1149.1 4. QUALITY ASSURANCE PROVISIONS 4.1 Samplinq and inspection. For device classes Q and V, sampling and inspection proc

39、edures shall be in accordance with MIL-PRF-38535 or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be in accordance wit

40、h MIL-PRF-38535, appendix A. 4.2 Screeninq. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted on all devices prior to qualification and technology conformance inspection. For device class M, screening shall be in accordance with method 5004 of MI

41、L-STD-883, and shall be conducted on all devices prior to quality conformance inspection. 4.2.1 Additional criteria for device class M. a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision leve

42、l control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1015. (2) TA = +125“C, minimum. b. Interim and final ele

43、ctrical test parameters shall be as specified in table II herein. STAN DARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 I 5962-96744 DSCC FORM 2234 APR 97 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-TABLE I. Elec

44、trical performance characteristics. High level input voltage High level input voltage Low level input voltage - 21 - 31 - 21 31 voltage 41 51 High level output VIH VIHCR VIL VOH High level input current - 61 zl IIH Low level input current - 61 IIL Low level input current - 71 Three-state leakage cur

45、rent8/1101111 current el 131 current 131 current BI current 21 current 111 Three-state leakage current 91 Supply current (internal) Ml - 161 - 171 181 Three-state leakage Three-state leakage Three-state leakage Three-state leakage Three-state leakage Supply current (idle) Input capacitance IILP IOZH

46、 IOZL IOZHP IOZLC IOZLA IOZLAR IOZLS IDDIN IDDIDLE GIN Test Test conditions 11 Unless otherwise specified -55C I Tc I +I 25C Limits I Unit Symbol Group A subgroups I,? 3 I,? 3 I,? 3 Device Type All All All VDD = max VDD = max VDD = min VDD = min, IOH = -2.0 mA All I Low level output voltage 41 51 VD

47、D = min, IOL = 4.0 mA All All All VDD = max, VIN = VDD = max VDD = max, VIN = O V VDD = max, VIN = O V All All All All All All All VDD = max, VIN = VDD = max VDD = max, VIN = O V VDD = max, VIN = VDD = max VDD = max, VIN = O V VDD = max, VIN = 2.0 V VDD = max, VIN = O V VDD = max, VIN = O V tCK = 27

48、 ns, VDD = max All All tCK = 27 ns, VDD = max All All 4 flN = I MHZ, TCASE = 25“C, VIN = 2.5 V See 4.4.1 c See 4.4.1 b I Functional test 7, 8 All See footnotes at end of table. STAN DARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 SIZE IA I 5962-96744 I SHEET 6 REVI

49、SION LEVEL DSCC FORM 2234 APR 97 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-TABLE I. Electrical Performance characteristics - Continued. REVISION LEVEL SHEET 7 Test Symbol Test conditions 11 Group A See figure 4 9, 10, 11 Device Limits Unit tCK CLKIN period CLKIN width low tCKL 9, 10, 11 + 9, 10, 11 CLKIN width high I tCKH I I CLKIN riselfall I tCKRF + tWRST (0.4 V-2.0 V) RESET pulse width 9, 10, 11

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