1、LTR I DESCRIPTION I DATE(YR-MO-DA) I APPROVED I I REV SHEET REV I I I 12 3 4 5 6 7 8 9 1011 121314 I 1 I I I I _- _. _ REVISION LEVEL SHEET I I I 1 CA;FlD distribution is unlimited. 5962-E284-96 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SMD-5%b
2、2-96761 9799996 O084717 17T w 1. SCOPE 1.1 a. This drawing docunents two product assurance class levels consisting of high reliability (device classes 9 and MI and space application (device class V). and are reflected in the Part or Identifying Ntmkr (PIN). (RHA) levels are reflected in the PIN. A c
3、hoice of case outlines and lead finishes are available Uhen available, a choice of Radiation Hardness Assurance 1.2 PIIJ. The PIN shall be as shown in the following example: 96761 Federal RHA IlII Device Device Case Lead 1 stock class designator type class outline finish designator (see 1.2.1) (see
4、1.2.2) designator (see 1.2.4) (see 1.2.5) LA (see 1.2.3) w Drawing nunber 1.2.1 RHA designator. Device classes P and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. specified RHA levels and are marked with the appropriate RHA desig
5、nator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A A dash (-1 indicates a non-RHA device. 1.2.2 Device tmm . The device typeCs) identify the circuit function as follows: Device tvDe Generic number Circuit function o1 54CDC341 I-line to 8-line clock driver, TTL compatible inp
6、uts 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device reauirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accor
7、dance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s1. The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter R S 2 1.2.5 Lead finish. The MIL-PRF-38535, appendix A f DescriDtive designator GDIPI-T2O or CDIP2-
8、T2O GDFP2-F2O or CDFP3-FZO CQCCI -N20 ead finish is as specified r device class M. Terminals Package stvle 20 Dual-in-line 20 Flat pack 20 . Square leadless chip carrier n MIL-PRF-38535 for device classes 9 and V or STANDARD MICROCIRCUIT DRAWING DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 5
9、962-96761 REVISION LEVEL SHEET DESC FORM 19% JUL 94 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,- SUB-5762-96761 m 7999996 008Y718 006 m k 1.3 Absolute maximum ratinas. I/ 2/ 3/ Supply voltage range (ilcc) . DC input voltage range (VIN) DC output
10、voltage range in the high or power-off state (VOUT) DC output current (IOL) (per output) OC input clamp current (IIK) (V 2.0 V. The test vectors used to verify the truth table shall, at a Functional tests shall be performed in is guaranteed across the full voltage and case operating temperature rang
11、e but is measured only at Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-Device type Terminal symbol A mG (m = 1 to 2) mYn (m = 1 to 2; n = 1 to 4) Case outlines Description Data input Output control inputs Data outputs Terminal nuhr Inputs IC ZG A
12、X X L L L H L H H H L H H H H 1 Outputs 1Yn 2Y n L L L L L H H L H H L 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 STAN DARD MICROCIRCUIT DRAWING DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 o1 SIZE A 5962-96761 REVISION LEVEL SHEET 10 R, S, and 2 Terminal symbol 26 A PO PI 2Y3 GND GND 2Y
13、2 2Y 1 GND 1Y4 1 Y3 GND 1Y2 1Y1 vcc JUL 94 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,- SMD-5962-%6761 9779996 008472b 182 1G 26 A II FIGURE 3. Loqic diaqram. 1Y1 1Y2 1Y3 1Y4 2Y 1 2Y2 2Y3 2Y4 REVISIO! STANDARD MICROCIRCUIT DRAWING DEFENSE ELECTRO
14、NICS SUPPLY CENTER DAYTON, OHIO 45444 1 5962-96761 I SHEET1l 1 LEVEL DESC FORM 193A JUL 94 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,- SND-59b2-9b761 W b 0084727 O19 W SVITCHING INPUT INPUT SKEW ACTIVE OUTPUTS QUIET OUTPUT UNDER TEST NOTES: IN-P
15、HASE INPUTS OUT -OF-PHASE INPUTS 3.0V 3.0V 1.5v 1% tsk i J( %k 1: 3.0V tsk -( ,( )! tsk 39V - 1.5v - 1.sv 0.Ov / I I OUTPUT 1 (n OUTPUTS) DUT -IF$% OUTPUT n 1. C the test jig and probe. 2. RL = 4500 11 percent, chip resistor in series with a 500 termination. termination shall be the 500 characterist
16、ic impedance of the coaxial connector to the osci1toscope. 3. Input signal to the device under test: a. VIN = 0.0 V to 3.0 V; duty cycle = 50 percent; fIN -1 MHz. b. tr, tf =.3-ns 11.0 ns. 3.0 ns limit may be increased up to 10 ns, as needed, maintaining the 21.0 ns tolerance and guaranteeing the re
17、sults at 3.0 ns 11.0 ns; skew between any two switching inputs signals (tSk): icludes a 47 pF ( ip capacitor (-O percent, +20 percent) and at least 3 pF of equivalent capacitance from For monitored outputs, the 504 For input signal generators incapable of maintaining these values of t,. and tf, the
18、i 250 pc. FIGURE 4. Ground bounce load circuit and waveforms. STANDARD MICROCIRCUIT DRAWING DEFENSEELECTRONICSSUPPLYCENTER DAYTON, OHIO 45444 I I I 5962-96761 I REVISION LEVEL SHEET I 12 I I I DESC FORM 193A JUL 94 - Provided by IHSNot for ResaleNo reproduction or networking permitted without licens
19、e from IHS-,-,-SMD-5962-96761 9979996 0084728 T55 A INPUT 1G INPUT 2G INPUT 7 IYn I I I OUTPUT i-t PLH2 2Yn OUTPUT 3.0 V 1.5V 0.0 v 3.0 V 1.5V 0.0 v 3.0 V “OH 1.5v VOL OH 1.5 V VOL iIOTES: I. Output skew, tsk(o), is calculated as the greater of: the difference between the fastest and slowest of tpLH
20、n (n = 1, 2). the difference between the fastest and slowest of tpHLn (n = 1, 2). 2. Pulse skew, t,k(p), is calculated as the greater of ItpLHn - tpHLnl (n = 1, 2). 3. Process skew, tskCp ), is calculated as the greater of: the difference getween the fastest and slowest of tpLHn (n = 1, 2) across mu
21、ltiple devices under identical operating conditions the difference between the fastest and slowest of tpHLn (n = 1, 2) across multiple devices under identical operating conditions a. b. a. b. FIGURE 5. switchins waveforms and test circuit. STAN DARD MICROCIRCUIT DRAWING DEFENSE ELECTRONICS SUPPLY CE
22、NTER DAYTON, OHIO 45444 I 5962-96761 1 I REVISION LEVEL DESC FORM 193A JUL 94 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SMD-5962-967bl W 9999996 0084729 991 W PULSE GENERATOR 0.0 vos3 - PHL 1 t t - PLHI DATA INPUT VIN DEVICE UNDER TEST - - Y9 -
23、 1 OUTPUT - RT vcc 7TCL OTHER INPUTS TIED TU VCC UR GND 1 STANDARD MICROCIRCUIT DRAWING DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 II AS RERUIRED SIZE A 5962-96761 SHEET REVISION LEVEL 14 RL JUL 94 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IH
24、S-,-,-i SMD-5962-9676L 9999996 O084730 603 = 4.4 Conformance inswction. Technology conformance inspection for classes Q and V shall be in accordance with MIL- PRF-38535 including groups A, B, C, D, and E inspections and as specified herein except where option 2 of YIL-PRF-38535 permits alternate in-
25、line control testing. in accordance with MIL-PRF-38535, appendix A and as Specified herein. Inspections to be performed for device class H shall be those specified in method 5005 of MIL-STD-883 and herein for groups A, BI C, D, and E inspections (see 4.4.1 through 4.4.4). Quality conformance inspect
26、ion for device class M shall be 4.4.1 Group A inswction. a. Tests shall be as specified in table II herein. b. For device class M, subgroups 7 and 8 tests shall be sufficient to verify the truth table in figure 2 herein. The test vectors used to verify the truth table shall, at a minimm, test all fu
27、nctions of each input and output. truth table in figure 2 herein. For device classes Q and V, subgroups 7 and 8 shall include verifying the functionality of the device; these tests shall have been fault graded in accordance with MIL-STD-883, test method 5012 (see 1.5 herein). CIN shall be measured o
28、nly for initial qualification and after process or design changes which may affect capacitance. C test may be periormed at 10 MHz and guaranteed, if not tested, at 1 MHz. (VEIAS) = 2.5 V or 3.0 V. For CIN, a device manufacturer may qualify devices by functional groups. composed of function types, th
29、at by design, will yield the same capacitance values when tested in accordance with table I herein. device manufacturer may then test one device function from a functional group to the limits and conditions specified herein. tested, to the limits and conditions specified in table I herein. The devic
30、e manufacturer shall submit to DESC-EC the device functions listed in each functional group and the test results for each device tested. These tests shall be performed only for initial qualYFication, after process or design changes which may affect the performance of the device, and any changes to t
31、he test fixture. device. outputs. the worst case package type supplied to this document. tested, to the limits established for the worst case package. determined by the manufacturer. measured peak values for each device tested and detailed oscilloscope plots for each VOLPI .Vo “, VOHp, and VgHv from
32、 one sample part per function. The plot shall contain the waveforms of both a switcking output and t e output under test. Each device manufacturer shall test product on the fixtures they currently use. Uhen a new fixture is used, the device manufacturer shall inform DESC-EC of this change and test t
33、he 5 devices on both the new and old test fixtures. The device manufacturer shall then suhit to DESC-EC data from testing on both fixtures that shall include all measured peak values for each device tested and detailed oscilloscope plots for each VOLP. VOL, VoHp, and VoHv from one sample part per fu
34、nction. switching output and the output under test. For VOLP. VoLv, VoRp, and VOHV, a device manufacturer may qualify devices by functional groups. A specific functional group s all be composed of function types, that by design, will yield the same test values when tested in accordance with table I
35、herein. VOLP. VOLV. VPHP: and VOHV tesFs. The device manufacturer may then test one device function from a functional group to the All other device functions in that particular functional group shall be guaranteed, if not tested, to the limits and conditions specified in table I herein. device manuf
36、acturer shall submit to DESC-EC the device functions listed in each functional group and the test results, along with the oscilloscope plots, for each device tested. All possible input to output logic patterns per function shall be guaranteed, if not tested, to the c. shall be measured between the d
37、esignated terminal and GND at a frequency of 1 MHz. This The DC bias for the pin under test For CIN, test all applicable pins on five devices with zero failures. A specific functional group shall be lhe device manufacturer shall set a functional group limit for the CIN tests. All other device functi
38、ons in that particular functional group shall be guaranteed, if not The d. Ground and V bounce tests are required for all device classes. V VoLv, VOHp, and VOHV shall be measured for the worst case outputs of the All other outputs shaiPLL guaranteed, if not tested, to the limits established for the
39、worst case All other package types shall be guaranteed, if not The device manufacturer will submit to DESC-EC data that shall include all The worst case outputs tested are to be determined by the manufacturer. Test 5 devices assembled in The package type to be tested shall be The plot shall contain
40、the waveforms of both a The device manufacturer shall set a functional group limit for the imits and conditions specified herein. The 4.4.2 Group C inspection. The group C inspection end-point electrical parameters shall be as specified in table II herein. STAN DARD MICROCIRCUIT DRAWING I 5962-96761
41、 REVISION LEVEL SHEET DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 I I I DESC FORM 193A JUL 94 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,- SMD-5962-96761 9999996 0084731 54T J Devi ce Device class Q class V I TABLE II. Electrical test re
42、auiremenB. Group A test Group C end-point electrical requirements (see 4.4) parameters (see 4.4) parameters (see 4.4) parameters (see 4.4) Group D end-point electrical Group E end-point electrical Test requirements 1, 2, 3, 4, 7, 1, 2, 3 8, 9, IO, 11 1, 2, 3 1, 7, 9 Subgroups (in accordance with MIL
43、-STD-883, method 5005, table I) Device class M Subgroups (in accordance with MIL-1-38535, table III) I - Interim electrical - parameters (see 4.2) Final electrical 1, 2, 3, 7, parameters (see 4.2) 8, 9, 10, 11 III 1, 2, 3, 7, 8, 9, 10, 11 II 1, 2. 3, 4, 7, 8, 9, IO, 11 1, 2, 3, 7, 8 1, 2, 3 7, 8 1,
44、2, 3, 7, 8, 9, IO, 11 z/ 1. 2, 3, 4, 7, 8, 9, IO, 11 1, 2, 3, 7, 8, 9, IO, 11 1, 2, 3 7, 8 1, 7, 9 I/ PDA applies to subgroup I. z/ PDA applies to subgroups 1 and 7. 4.4.2.1 Additional criteria for device class M. Steady-state life test conditions, method 1005 of MIL-STD-883: a. Test condition A, B,
45、 C, or D. The test circuit shall be maintained by the manufacturer under docwnt revision level control and shall be made available to the preparing or acquiring activity upon request. test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the
46、 intent specified in test method 1005 of MIL-STD-883. The b. TA = +125C, minimum. c. Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883. 4.4.2.2 Additional criteria for device classes and V. The steady-state life test duration, test condition and test temperature, or appro
47、ved alternatives shall be as specified in the device manufacturers PM plan in accordance uith MIL-PRF-38535. manufacturers TRB in accordance with MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. accordance with the intent specified in test method 1005 of
48、 MIL-STD-883. The test circuit shall be maintained under document revision level control by the device The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in 4.4.3 GrouR D insrxction. The group D inspection end-point electrical parameters shall be as spe
49、cified in table II herein. 4.4.4 GrouR E inswction. Group E inspection is required only for parts intended to be marked as radiation hardness assured (see 3.5 herein). a. End-point electrical parameters shall be as specified in table II herein. b. For device classes P and V, the devices or test vehicle shall be subjected to radiation hardness assured tests as specified i
