DLA SMD-5962-96795 REV D-2009 MICROCIRCUIT MEMORY DIGITAL 256K X 16 STATIC RANDOM ACCESS MEMORY (SRAM) MONOLITHIC SILICON.pdf

上传人:吴艺期 文档编号:701092 上传时间:2019-01-01 格式:PDF 页数:25 大小:191.27KB
下载 相关 举报
DLA SMD-5962-96795 REV D-2009 MICROCIRCUIT MEMORY DIGITAL 256K X 16 STATIC RANDOM ACCESS MEMORY (SRAM) MONOLITHIC SILICON.pdf_第1页
第1页 / 共25页
DLA SMD-5962-96795 REV D-2009 MICROCIRCUIT MEMORY DIGITAL 256K X 16 STATIC RANDOM ACCESS MEMORY (SRAM) MONOLITHIC SILICON.pdf_第2页
第2页 / 共25页
DLA SMD-5962-96795 REV D-2009 MICROCIRCUIT MEMORY DIGITAL 256K X 16 STATIC RANDOM ACCESS MEMORY (SRAM) MONOLITHIC SILICON.pdf_第3页
第3页 / 共25页
DLA SMD-5962-96795 REV D-2009 MICROCIRCUIT MEMORY DIGITAL 256K X 16 STATIC RANDOM ACCESS MEMORY (SRAM) MONOLITHIC SILICON.pdf_第4页
第4页 / 共25页
DLA SMD-5962-96795 REV D-2009 MICROCIRCUIT MEMORY DIGITAL 256K X 16 STATIC RANDOM ACCESS MEMORY (SRAM) MONOLITHIC SILICON.pdf_第5页
第5页 / 共25页
点击查看更多>>
资源描述

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R159-97. 96-12-20 Raymond Monnin B Change to Table I; ICCDR, device type column. Updated boilerplate. ksr 98-02-18 Raymond Monnin C Correct E2 dimension on package X from 3.85 min and 3.95 max to .385 min and .

2、395 max inches. Change the IOLtest condition for VOLfrom 8 mA to 6 mA in Table I. Updated boilerplate. ksr 04-10-27 Raymond Monnin D Add device type 07, updated Table I for 07 device, corrected Figure 3, and added package Z. ksr 09-01-21 Robert Heber REV SHET REV D D D D D D D D D D SHEET 15 16 17 1

3、8 19 20 21 22 23 24 REV STATUS REV D D D D D D D D D D D D D D OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Gary L. Gross DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 STANDARD MICROCIRCUIT CHECKED BY Jeff Bowling http:/www.dscc.dla.mil DRAWING THIS DRAWING IS AVA

4、ILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 96-05-17 MICROCIRCUIT, MEMORY, DIGITAL, 256K X 16 STATIC RANDOM ACCESS MEMORY (SRAM), MONOLITHIC SILICON SIZE A CAGE CODE 67268 5962-96795 AMSC N/A REVISION LEVEL D SHEET 1 O

5、F 24 DSCC FORM 2233 APR 97 5962-E129-09 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96795 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1

6、.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a c

7、hoice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 96795 01 M X A | | | | | | | | | | | | | | | | | Federal RHA Device Device Case Lead stock class designator type class outline finish designator (see 1.2.1) (see

8、 1.2.2) designator (see 1.2.4) (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix

9、 A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number 1/ Circuit function Data retention Access time 01 256K X 16 CMOS SRAM No 35

10、 ns 02 256K X 16 CMOS SRAM No 25 ns 03 256K X 16 CMOS SRAM No 20 ns 04 256K X 16 CMOS SRAM Yes 35 ns 05 256K X 16 CMOS SRAM Yes 25 ns 06 256K X 16 CMOS SRAM Yes 20 ns 07 256K X 16 CMOS SRAM Yes 12 ns 1.2.3 Device class designator. The device class designator is a single letter identifying the produc

11、t assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case

12、outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X See figure 1 44 flatpack package Y See figure 1 44 CSOJ package Z See figure 1 44 SO flatpack package 1.2.5 Lead finish. The lead finish is as specified i

13、n MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. _ 1/ Generic numbers are listed on the Standard Microcircuit Drawing Source Approval Bulletin at the end of this document and will also be listed in MIL-HDBK-103 (see 6.6.2 herein). Provided by IHSNot for Res

14、aleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96795 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 2/ Voltage on any input relative to VSS(device

15、s 01 06) - -0.5 V dc to +7.0 V dc (device 07) - -0.5 V dc to +6.0 V dc Storage temperature range - -65C to +150C Maximum power dissipation (PD)- 1.5 W Lead temperature (soldering, 10 seconds) - +260C Thermal resistance, junction-to-case (JC): Case X - 5C/W Case Y - 8C/W Case Z - 7C/W Junction temper

16、ature (TJ) - +150C 3/ Output current - 20 mA 1.4 Recommended operating conditions. Supply voltage range (VCC) - 4.5 V dc to 5.5 V dc Supply voltage (VSS) - 0 V Input high voltage range (VIH) - 2.2 V dc to VCC+ 0.5 V dc Input low voltage range (VIL) (devices 01 06)- -0.3 V dc to +0.8 V dc 4/ (device

17、07) - -0.5 V dc to +0.8 V dc 4/ Case operating temperature range (TC) - -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise spe

18、cified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - I

19、nterface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or from the Standardiz

20、ation Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of the documents are the issues of the documents ci

21、ted in the solicitation. AMERICAN SOCIETY FOR TESTING AND MATERIALS (ASTM) ASTM Standard F1192-00 - Standard Guide for the Measurement of Single Event Phenomena from Heavy Ion Irradiation of Semiconductor Devices. (Applications for copies of ASTM publications should be addressed to: ASTM Internation

22、al, PO Box C700, 100 Barr Harbor Drive, West Conshohocken, PA 19428-2959; http:/www.astm.org.) _ 2/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 3/ Maximum junction temper

23、ature shall not be exceeded except for allowable short duration burn-in screening conditions in accordance with method 5004 of MIL-STD-883. 4/ VILminimum = -3.0 V dc for pulse width less than 20 ns. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STA

24、NDARD MICROCIRCUIT DRAWING SIZE A 5962-96795 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 4 DSCC FORM 2234 APR 97 ELECTRONICS INDUSTRIES ASSOCIATION (EIA) JEDEC Standard EIA/JESD78 - IC Latch-Up Test. (Applications for copies should be addressed to the Electronics

25、Industries Association, 2500 Wilson Boulevard, Arlington, VA 22201; http:/www.jedec.org.) (Non-Government standards and other publications are normally available from the organizations that prepare or distribute the documents. These documents also may be available in or through libraries or other in

26、formational services.) 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been o

27、btained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the

28、form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical d

29、imensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.4 herein and figure 1. 3.2.2 Terminal connections. The terminal connections sh

30、all be as specified on figure 2. 3.2.3 Truth table(s). The truth table(s) shall be as specified on figure 3. 3.2.4 Functional tests. Various functional tests used to test this device are contained in the appendix. If the test patterns cannot be implemented due to test equipment limitations, alternat

31、e test patterns to accomplish the same results shall be allowed. For device class M, alternate test patterns shall be maintained under document revision level control by the manufacturer and shall be made available to the preparing or acquiring activity upon request. For device classes Q and V alter

32、nate test patterns shall be under the control of the device manufacturers Technology Review Board (TRB) in accordance with MIL-PRF-38535 and shall be made available to the preparing or acquiring activity upon request. 3.3 Electrical performance characteristics and postirradiation parameter limits. U

33、nless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups spec

34、ified in table IIA. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limi

35、tations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF

36、-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device c

37、lasses Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved sou

38、rce of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for de

39、vice class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered t

40、o this drawing. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96795 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 5 DSCC FORM 2234 APR 97 3.8 Notification of change for dev

41、ice class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring act

42、ivity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in

43、microcircuit group number 41 (see MIL-PRF-38535, appendix A). 4. VERIFICATION 4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with MIL-PRF-38535 or as modified in the device manufacturers Quality Management (QM) plan. The modificatio

44、n in the QM plan shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be

45、 conducted on all devices prior to qualification and technology conformance inspection. For device class M, screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. 4.2.1 Additional criteria for device class M. a. Delete the sequence specified as initial (preburn-in) electrical parameters through interim (postburn-in) electrical parameters of method 5004 and substitute lines 1 through 6 of table I

展开阅读全文
相关资源
猜你喜欢
相关搜索

当前位置:首页 > 标准规范 > 国际标准 > 其他

copyright@ 2008-2019 麦多课文库(www.mydoc123.com)网站版权所有
备案/许可证编号:苏ICP备17064731号-1