1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R344-97. 97-06-12 K. A. Cottongim B Correct table II. 98-05-14 K. A. Cottongim C Correct dimensioning for figure 1, case outline Z. 01-09-25 Raymond Monnin D Add device type 07. Redefine table I for device type
2、s 01 through 06. 03-06-18 Raymond Monnin E Rewrite paragraphs 4.2.a.2. and 4.3.3.b.2 to add TC. 04-11-15 Raymond Monnin F Add device types 08 through 13. Figure 1, add case outline U. 05-05-11 Raymond Monnin G Add devices types 14 through 17. 1.3: Correct footnote 2/ from “Hottest die.” to “Since th
3、ere are multiple components in this part. Thermal impedance is provided only for the hottest die”. 1.4: Correct footnotes 1/ through 4/, from VCCto V logic. Table I; Added supply current limits for 50 percent and 100 percent duty cycles. VTHcorrect max limit from 700 mVp-p to 860 mVp-p. Table lll, c
4、hange pins “TXINHA and TXINHB” TO “TX INH OUT A and TX INH OUT B” Add terminal symbol “TX INH IN A an d TX INH IN B”. -gc 13-03-19 Charles F. Saffle REV SHEET REV G G G G G G G G SHEET 15 16 17 18 19 20 21 22 REV STATUS REV G G G G G G G G G G G G G G OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14
5、 PMIC N/A PREPARED BY Gary Zahn DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil/ STANDARD MICROCIRCUIT DRAWING CHECKED BY Michael C. Jones THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Kendall A. Cottongim MICROCIRCUIT, HYBRID, LINEAR, MIL-STD-155
6、3, BC/RTU/MT, MULTIPLEXED TERMINAL AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 97-02-10 AMSC N/A REVISION LEVEL G SIZE A CAGE CODE 67268 5962-96887 SHEET 1 OF 22 DSCC FORM 2233 APR 97 5962-E489-12 Provided by IHSNot for ResaleNo reproduction or networking permitted without licens
7、e from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96887 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents five product assurance classes as defined in paragraph 1.2.3 and MIL-PRF-38534. A choice of case ou
8、tlines and lead finishes which are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of radiation hardness assurance levels are reflected in the PIN. 1.2 PIN. The PIN shall be as shown in the following example: 5962 - 96887 01 H X X Federal RHA Device Devi
9、ce Case Lead stock class designator type class outline finish designator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 Radiation hardness assurance (RHA) designator. RHA marked devices shall meet the MIL-PRF-38534 specified RHA levels and shall be ma
10、rked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 BU61582X1 MIL-STD-1553, BC/RT/MT, 32K RAM, +5/-15 V transceiver 02 BU61582X2 MIL-STD-1553
11、, BC/RT/MT, 32K RAM, +5/-12 V transceiver 03 BU61583X1 MIL-STD-1553, BC/RT/MT, 32K RAM, +5/-15 V transceiver, RT address latch 04 BU61583X2 MIL-STD-1553, BC/RT/MT, 32K RAM, +5/-12 V transceiver, RT address latch 05 BU61582X0 MIL-STD-1553, BC/RT/MT, 32K RAM, transceiverless 06 BU61583X0 MIL-STD-1553,
12、 BC/RT/MT, 32K RAM, transceiverless, RT address latch 07 BU61582X3 MIL-STD-1553, BC/RT/MT, 32K RAM, +5/+5 V transceiver 08 BU63825X1 MIL-STD-1553, BC/RT/MT, 32K RAM, +5/-15 V transceiver 09 BU63825X2 MIL-STD-1553, BC/RT/MT, 32K RAM, +5/-12 V transceiver 10 BU63925X1 MIL-STD-1553, BC/RT/MT, 32K RAM,
13、+5/-15 V transceiver, RT address latch 11 BU63925X2 MIL-STD-1553, BC/RT/MT, 32K RAM, +5/-12 V transceiver, RT address latch 12 BU63825X0 MIL-STD-1553, BC/RT/MT, 32K RAM, transceiverless 13 BU63925X0 MIL-STD-1553, BC/RT/MT, 32K RAM, transceiverless, RT address latch 14 BU63825X3 MIL-STD-1553, BC/RT/M
14、T, 32K RAM, +5/+5 V transceiver 15 BU63825X6 MIL-STD-1553, BC/RT/MT, 32K RAM, +5/+5 V transceiver with “TX INHIBIT” (Transmit Inhibit) 16 BU63925X3 MIL-STD-1553, BC/RT/MT, 32K RAM, +5/+5 V transceiver, RT address latch 17 BU63925X6 MIL-STD-1553, BC/RT/MT, 32K RAM, +5/+5 V transceiver, RT address lat
15、ch with “TX INHIBIT” (Transmit Inhibit) 1.2.3 Device class designator. This device class designator shall be a single letter identifying the product assurance level. All levels are defined by the requirements of MIL-PRF-38534 and require QML Certification as well as qualification (Class H, K, and E)
16、 or QML Listing (Class G and D). The product assurance levels are as follows: Device class Device performance documentation K Highest reliability class available. This level is intended for use in space applications. H Standard military quality class level. This level is intended for use in applicat
17、ions where non-space high reliability devices are required. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96887 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 3 DSCC FORM 2234 APR 97
18、 G Reduced testing version of the standard military quality class. This level uses the Class H screening and In-Process Inspections with a possible limited temperature range, manufacturer specified incoming flow, and the manufacturer guarantees (but may not test) periodic and conformance inspections
19、 (Group A, B, C, and D). E Designates devices which are based upon one of the other classes (K, H, or G) with exception(s) taken to the requirements of that class. These exception(s) must be specified in the device acquisition document; therefore the acquisition document should be reviewed to ensure
20、 that the exception(s) taken will not adversely affect system performance. D Manufacturer specified quality class. Quality level is defined by the manufacturers internal, QML certified flow. This product may have a limited temperature range. 1.2.4 Case outline(s). The case outline(s) are as designat
21、ed in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style U See figure 1 70 Flat package with ceramic tie bars X See figure 1 70 Dual-in-line Y See figure 1 70 Flat package Z See figure 1 70 Gull wing 1.2.5 Lead finish. The lead finish shall be as specified in
22、MIL-PRF-38534. 1.3 Absolute maximum ratings. 1/ Transceiver, channels A and B, positive input supply voltage range (+5VA, +5VB): Device types 01 through 04, and 07 -0.3 V dc to +6.0 V dc Transceiver, channels A and B, positive input supply voltage range (+5VA, +5VB): Device types 08 through 11, and
23、14 through 17 -0.5 V dc to +7.0 V dc Transceiver, channels A and B, negative input supply voltage range (-VA, -VB): Device types 01, 02, 03, and 04 +0.5 V dc to -18 V dc Transceiver, channels A and B, negative input supply voltage range (-VA, -VB): Device types 08, 09, 10, and 11 +0.5 V dc to -18 V
24、dc Logic supply voltage range (+5 V logic): Device types 01 through 07 . -0.3 V dc to +6.0 V dc Device types 08 through 17 . -0.5 V dc to +6.5 V dc Power dissipation (PD): 1/ 2/ 3/ Device types 01, 03, 08, and 10 3.77 W Device types 02, 04, 09, and 11 3.71 W Device types 05, 06, 12, and 13 0.75 W De
25、vice type 07, and 14 through 17 2.23 W Storage temperature range . -65C to +150C Lead temperature (soldering, 10 seconds) . +300C Thermal resistance, junction to case (JC): Device types 01 through 07 . 6.99C/W 2/ Device types 08, 09, 10, and 11 7.82C/W 2/ Device types 12 and 13 . 7.10C/W 2/ Device t
26、ypes 14 through 17 . 12C/W 2/ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. Applies up to TC= +125C. 2/ Since there are multiple components in this part. Thermal impedan
27、ce is provided only for the hottest die. 3/ Assumes 100 percent transmitter duty cycle on one channel and 0 percent duty cycle on the other channel. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96887 DLA L
28、AND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 4 DSCC FORM 2234 APR 97 1.4 Recommended operating conditions. Transceiver, channels A and B, positive input supply voltage range (+5VA, +5VB): Device types 01 through 04 and 08 through 11 . +4.5 V dc to +5.5 V dc Device types 07, and
29、14 through 17 +4.75 V dc to +5.25 V dc Logic supply voltage range (+5 V logic): Device types 01 through 06 and 08 through 17 . +4.5 V dc to +5.5 V dc Device type 07 . +4.75 V dc to +5.25 V dc Transceiver, channels A and B, negative input supply voltage range (-VA, -VB): Device types 01, 03, 08 and 1
30、0 . -14.25 V dc to -15.75 V dc Device types 02 , 04, 09, and 11 . -11.40 V dc to -12.60 V dc Minimum logic high input voltage (VIH): Device types 01 through 07 . 3.9 V dc Device types 08 through 17 . 3.85 V dc 1/ Device types 08 through 17 . 2.0 V dc 2/ Maximum logic low input voltage (VIL). 1.3 V d
31、c Device types 01 through 07 . 1.3 V dc Device types 08 through 17 . 1.35 V dc 3/ Device types 08 through 17 . 0.8 V dc 4/ Operating frequency (FOP) 12 MHz or 16 MHz Case operating temperature range (TC) -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. Th
32、e following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38534 - Hybrid Microcircuits, General
33、 Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard for Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit
34、Drawings. (Copies of these documents are available online at https:/assist.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the
35、 references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 1/ At V logic = 5.5 V dc, MSTCLR, CLOCK IN, STRBD inputs. 2/ At V logic = 5.5 V dc, all other inputs. 3/ A
36、t V logic = 4.5 V dc, MSTCLR, CLOCK IN, STRBD inputs. 4/ At V logic = 4.5 V dc, all other inputs. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96887 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION
37、 LEVEL G SHEET 5 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item performance requirements for device classes D, E, G, H, and K shall be in accordance with MIL-PRF-38534. Compliance with MIL-PRF-38534 may include the performance of all tests herein or as designated in
38、 the device manufacturers Quality Management (QM) plan or as designated for the applicable device class. The manufacturer may eliminate, modify or optimize the tests and inspections herein, however the performance requirements as defined in MIL-PRF-38534 shall be met for the applicable device class.
39、 In addition, the modification in the QM plan shall not affect the form, fit, or function of the device for the applicable device class. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38534 and herein. 3.2.1 Case
40、outline(s). The case outline(s) shall be in accordance with 1.2.4 herein and figure 1. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2. 3.2.3 Pin functions. The pin functions shall be as specified in table III. 3.3 Electrical performance characteristics. Unless
41、 otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full specified operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tes
42、ts for each subgroup are defined in table I. 3.5 Marking of device(s). Marking of device(s) shall be in accordance with MIL-PRF-38534. The device shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers vendor similar PIN may also be marked. 3.6 Data. In addition to the gene
43、ral performance requirements of MIL-PRF-38534, the manufacturer of the device described herein shall maintain the electrical test data (variables format) from the initial quality conformance inspection group A lot sample, for each device type listed herein. Also, the data should include a summary of
44、 all parameters manually tested, and for those which, if any, are guaranteed. This data shall be maintained under document revision level control by the manufacturer and be made available to the preparing activity (DLA Land and Maritime -VA) upon request. 3.7 Certificate of compliance. A certificate
45、 of compliance shall be required from a manufacturer in order to supply to this drawing. The certificate of compliance (original copy) submitted to DLA Land and Maritime -VA shall affirm that the manufacturers product meets the performance requirements of MIL-PRF-38534 and herein. 3.8 Certificate of
46、 conformance. A certificate of conformance as required in MIL-PRF-38534 shall be provided with each lot of microcircuits delivered to this drawing. 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38534 or as modified in the device m
47、anufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. 4.2 Screening. Screening shall be in accordance with MIL-PRF-38534. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883.
48、(1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to either DLA Land and Maritime -VA or the acquiring activity upon request. Also, the test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TAor TCas specified in the approved manufacturers QM plan. (3) Burn-in test shall be for 320 hours. b. Interim and final el