1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Corrections to table I. 98-03-23 K. A. Cottongim B Add device type 02. 99-10-08 Ray Monnin C Editorial corrections to tables I, III, and figures 1, 2, 3, 4. Update drawing boilerplate. 03-03-31 Raymond Monnin REV C C C C C C C C C C C C C C C C C
2、 SHEET 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 REV C C C C C C C C C C C C C C C C C C C C SHEET 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 REV STATUS REV C C C C C C C C C C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Gary Zahn DEFENSE S
3、UPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Michael C. Jones POST OFFICE BOX 3990 COLUMBUS, OHIO 43216-5000 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Kendall A. Cottongim MICROCIRCUIT, HYBRID, DIGITAL, QUAD, (4 X 32-BIT) MICROCONTROLLE
4、R, +5 VOLT SUPPLY AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 97-09-19 AMSC N/A REVISION LEVEL C SIZE A CAGE CODE 67268 5962-97506 SHEET 1 OF 51 DSCC FORM 2233 APR 97 5962-E206-03 DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited. Provided by IHSNot
5、 for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97506 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL C SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents five product assurance cl
6、asses as defined in paragraph 1.2.3 and MIL-PRF-38534. A choice of case outlines and lead finishes which are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of radiation hardness assurance levels are reflected in the PIN. 1.2 PIN. The PIN shall be as sho
7、wn in the following example: 5962 - 97506 01 H X C Federal RHA Device Device Case Lead stock class designator type class outline finish designator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 Radiation hardness assurance (RHA) designator. RHA marked
8、 devices shall meet the MIL-PRF-38534 specified RHA levels and shall be marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 AD14060BF/QML-4
9、 Quad digital signal processor, +5 V supply, 40 MHz, Twelve, 40 megabyte/s link ports (3 from each processor), Four, 40 megabit/s independent serial ports (1 from each processor) 02 AD14060TF/QML-4 Quad digital signal processor, +5 V supply, 40 MHz, Twelve, 40 megabyte/s link ports (3 from each proc
10、essor), Four, 40 megabit/s independent serial ports (1 from each processor) 1.2.3 Device class designator. This device class designator shall be a single letter identifying the product assurance level. All levels are defined by the requirements of MIL-PRF-38534 and require QML Certification as well
11、as qualification (Class H, K, and E) or QML Listing (Class G and D). The product assurance levels are as follows: Device class Device performance documentation K Highest reliability class available. This level is intended for use in space applications. H Standard military quality class level. This l
12、evel is intended for use in applications where non-space high reliability devices are required. G Reduced testing version of the standard military quality class. This level uses the Class H screening and In-Process Inspections with a possible limited temperature range, manufacturer specified incomin
13、g flow, and the manufacturer guarantees (but may not test) periodic and conformance inspections (Group A, B, C, and D). E Designates devices which are based upon one of the other classes (K, H, or G) with exception(s) taken to the requirements of that class. These exception(s) must be specified in t
14、he device acquisition document; therefore the acquisition document should be reviewed to ensure that the exception(s) taken will not adversely affect system performance. D Manufacturer specified quality class. Quality level is defined by the manufacturers internal, QML certified flow. This product m
15、ay have a limited temperature range. 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X See figure 1 308 Quad ceramic flat pack Provided by IHSNot for ResaleNo reproduction or networking permitt
16、ed without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97506 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL C SHEET 3 DSCC FORM 2234 APR 97 1.2.5 Lead finish. The lead finish shall be as specified in MIL-PRF-38534. 1.3 Absolute maximum ratings. 1/ Supply v
17、oltage (VDD) -0.3 V dc to +7.0 V dc Input voltage (VIN) -0.5 V dc to VDD+ 0.5 V dc Output voltage swing (VOUT) -0.3 V dc to VDD+ 0.5 V dc Load capacitance 200 pF Junction temperature under bias (TJ) +130C Junction-to-case temperature (JC) . 0.36C/W Lead temperature soldering (5 seconds). +280C Stora
18、ge temperature . -65C to +150C 1.4 Recommended operating conditions. Supply voltage (VDD) . +4.75 V dc to +5.25 V dc Case operating temperature range (TC): Device type 01 . -40C to +100C Device type 02 . -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. Th
19、e following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those listed in the issue of the Department of Defense Index of Specifications and Standards (DoDISS) and supplement thereto,
20、cited in the solicitation. SPECIFICATION DEPARTMENT OF DEFENSE MIL-PRF-38534 - Hybrid Microcircuits, General Specification for. STANDARDS DEPARTMENT OF DEFENSE MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. HANDBOOKS DEPARTMENT
21、 OF DEFENSE MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Unless otherwise indicated, copies of the specification, standards, and handbooks are available from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelph
22、ia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obta
23、ined. 1/ Stresses above the absolute maximum ratings may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRC
24、UIT DRAWING SIZE A 5962-97506 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL C SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item performance requirements for device classes D, E, G, H, and K shall be in accordance with MIL-PRF-38534. Co
25、mpliance with MIL-PRF-38534 may include the performance of all tests herein or as designated in the device manufacturers Quality Management (QM) plan or as designated for the applicable device class. Therefore, the tests and inspections herein may not be performed for the applicable device class (se
26、e MIL-PRF-38534). Furthermore, the manufacturer may take exceptions or use alternate methods to the tests and inspections herein and not perform them. However, the performance requirements as defined in MIL-PRF-38534 shall be met for the applicable device class. 3.2 Design, construction, and physica
27、l dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38534 and herein. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.4 herein and figure 1. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2.
28、 3.2.3 Block diagram(s). The block diagram(s) shall be as specified on figure 3. 3.2.4 Timing waveform(s). The timing waveform(s) shall be as specified on figure 4. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specif
29、ied in table I and shall apply over the full specified operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking of device(s). Marking of dev
30、ice(s) shall be in accordance with MIL-PRF-38534. The device shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers vendor similar PIN may also be marked. 3.6 Data. In addition to the general performance requirements of MIL-PRF-38534, the manufacturer of the device describ
31、ed herein shall maintain the electrical test data (variables format) from the initial quality conformance inspection group A lot sample, for each device type listed herein. Also, the data should include a summary of all parameters manually tested, and for those which, if any, are guaranteed. This da
32、ta shall be maintained under document revision level control by the manufacturer and be made available to the preparing activity (DSCC-VA) upon request. 3.7 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to supply to this drawing. The certificat
33、e of compliance (original copy) submitted to DSCC-VA shall affirm that the manufacturers product meets the performance requirements of MIL-PRF-38534 and herein. 3.8 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38534 shall be provided with each lot of microcircuits
34、delivered to this drawing. 4. QUALITY ASSURANCE PROVISIONS 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38534 or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit
35、, or function as described herein. 4.2 Screening. Screening shall be in accordance with MIL-PRF-38534. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document
36、 revision level control and shall be made available to either DSCC-VA or the acquiring activity upon request. Also, the test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1015 of MIL-STD-883. (2) TCas s
37、pecified in accordance with table I of method 1015 of MIL-STD-883. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97506 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL C SHEET 5 DSCC
38、FORM 2234 APR 97 b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. (1) Static supply current (IDDq). Checks that current draw is not grossly excessiv
39、e. Current exceeding 1.3 amperes on the module indicates failure. Normal measured current is about 0.5 amperes. (2) Interconnects. Checks for electrical continuity through the package leads and wire bonds, along with continuity of internal wiring within the module. (3) Single processor functional. A
40、 collection of test routines perform a rudimentary check of the basic functionally of each individual processor. The following individual processor units are tested: DAGs 1 and 2, timer, program sequencer, PX register, multiplier, data register file, shifter, ALU, link ports, serial ports, DMA, IOP
41、registers, and memory. (a) Serial port test. This routine uses internal loopback to test basic operation of serial port 0 and serial port 1, by transmitting and receiving 16-bit words. In addition, the COMPare operation of the ALU and BitSET operation of the shifter are tested. Serial ports are test
42、ed at a clock rate of 10 MHz. (b) Computation routine. The routine tests basic operation of the ALU through ADD, SUBTRACT, and COMPare functions. In addition, the multiplier and DAGs are tested using floating point multiply and load/write functions, while the shifter is tested with a BitSET function
43、. All operations use 32-bit words. (c) Link routine. Using 32-bit data and internal memory to memory receive, basic operation of Link buffers 0 - 5 is tested. In addition, the ALU, COMPare, and shifter BitSET functions are tested. (d) PX routine. This routine tests basic operation of the PX register
44、 and short word addressing. The PX register is loaded with a 48-bit word, then the PX is read into memory. Short word addressing is used to read back, in 16-bit word segments, the 48-bit word from memory. In addition, the ALU, COMPare, and shifter BitSET functions are tested. (e) Timer routine. This
45、 routine will count down the timer until tcount= 0, at which time an interrupt will occur, followed by a return to the code. This test will verify operation of the program sequencer, timer, ALU, COMPare function, and shifter BitSET function. (4) Multiprocessor functional. (a) Interprocessor links: a
46、ll tested using 2 times the clock rate (80 MHz). (b) Multiprocessor memory space: each processor accesses and checks memory of the other three processors. c. Final electrical test parameters shall be as specified in table II herein. Provided by IHSNot for ResaleNo reproduction or networking permitte
47、d without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97506 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL C SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Limits Test Symbol Conditions 1/ unless otherwise specified Group A
48、subgroups Device type Min Max Unit High level input voltage 2/ VIH1VDD= +5.25 V dc 1,2,3 01,02 2.0 V High level input voltage 3/ VIH2VDD= +5.25 V dc 1,2,3 01,02 2.2 V Low level input voltage 2/ 3/ VILVDD= +4.75 V dc 1,2,3 01,02 0.8 V High level output voltage 4/ VOHVDD= +4.75 V dc, 5/ IOH= -2.0 mA 1
49、,2,3 01,02 4.1 V Low level output voltage 4/ VOLVDD= +4.75 V dc, 5/ IOL= 4.0 mA 1,2,3 01,02 0.4 V High level input current 6/ 7/ 8/ IIHVDD= +5.25 V dc, VIN= VDDMAX 1,2,3 01,02 10 A High level input current 8/ 9/ 10/ IIHx4VDD= +5.25 V dc, VIN= VDDMAX 1,2,3 01,02 40 A Low level input current 6/ IILVDD=
