1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Drawing updated to reflect current requirements. gt 03-02-06 R. Monnin B Update drawing as part of five year review. -rrp 12-04-23 C. SAFFLE REV SHEET REV B B B B B B B B B B B B SHEET 15 16 17 18 19 20 21 22 23 24 25 26 REV STATUS REV B B B B B
2、B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Dan Wonnell DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF D
3、EFENSE CHECKED BY Raymond Monnin APPROVED BY Raymond Monnin MICROCIRCUIT, DIGITAL-LINEAR, DUAL, ASYNCHRONOUS COMMUNICATIONS ELEMENT WITH FIFO, MONOLITHIC SILICON DRAWING APPROVAL DATE 97-08-13 AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-97550 SHEET 1 OF 26 DSCC FORM 2233 APR 97 5962-E327-1
4、2 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97550 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product as
5、surance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) lev
6、els is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 97550 01 Q X A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2) Device class designator Case outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RH
7、A designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash
8、 (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 TL16C552AM Dual asynchronous communications element with FIFO 1.2.3 Device class designator. The device class designator is a single lett
9、er identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to
10、MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X See figure 1 68 Flat pack 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-P
11、RF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97550 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maxim
12、um ratings. 1/ 2/ Supply voltage range (VDD) -0.5 V dc to +7.0 V dc Input voltage (VIN) . -0.5 V dc to +7.0 V dc Continuous total power dissipation at 25C 1689 mW 3/ Operating free air temperature range (TA) -55C to +125C Storage temperature range (TSTG) -65C to +150C Thermal resistance, junction-to
13、-case (JC) 3C/W Thermal resistance, junction-to-air (JA) 74C/W Junction temperature (TJ) . +175C 1.4 Recommended operating conditions. 2/ Supply voltage range (VDD) . 4.75 V dc to 5.25 V dc High-level input voltage range (VIH) +2.0 V dc to VDDLow-level input voltage (VIL) +0.0 V dc to +0.8 V Clock f
14、requency, (fclock) . 16 MHz max Operating free-air temperature range (TA) -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise s
15、pecified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 -
16、 Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standar
17、dization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes
18、applicable laws and regulations unless a specific exemption has been obtained. _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Unless otherwise noted, all voltages ar
19、e referenced to GND. 3/ Above 25C, derate at a factor of 13.5mW/C. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97550 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234
20、 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the f
21、orm, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical di
22、mensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outline. The case outline shall be in accordance with 1.2.4 herein and figure 1. 3.2.2 Terminal connections. The terminal connections shall be
23、as specified on figure 2. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full ambient operating te
24、mperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN
25、 may also be marked. For packages where marking of the entire SMD PIN is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V sh
26、all be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class
27、 M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a c
28、ertificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply for this drawing shall affirm
29、that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-P
30、RF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DLA Land and Maritime -VA of change of product (see 6.2 herein) involving devices
31、 acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DLA Land and Maritime, DLA Land and Maritimes agent, and the acquiring activity retain the option to review the manufacturers facility and applicable re
32、quired documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 10 (see MIL-PRF-38535, appendix A). Provided by IHSN
33、ot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97550 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55
34、C TA +125C unless otherwise specified Group A subgroups Device Types Limits Unit Min Max High level output voltage VOHVDD = 5.25 V, VIH= 2 V, VIL= 0.8 V, IOH= -12 mA for PD0-PD7, IOH= -4 mA for all other outputs 1/ 1, 2, 3 All 2.4 V Low-level output voltage VOLVDD = 5.25 V, VIH= 2 V, VIL= 0.8 V, IOL
35、= 12 mA for PD0-PD7, IOL= 12 mA for INIT , AFD, STB , and SLIN, IOL= 4 mA for all other outputs 1, 2, 3 All 0.4 V Input current IIVDD = 5.25 V, all other terminals floating 2/ 1, 2, 3 All 10 A High impedance output current IOZVDD = 5.25 V, VO= 0 V with chip de-selected or VO= 5.25 V with chip and wr
36、ite-mode selected 1/ 1, 2, 3 All 20 A Dynamic supply current IDDVDD = 5.25 V, inputs at 0.8 V or 2.0 V, no loads on outputs, fCLK= 8 MHz 1, 2, 3 All 50 mA Clock Timing Requirements 3/ Pulse duration, CLK tw1see figure 3 9, 10, 11 All 31 ns Pulse duration, CLK tw2see figure 3 9, 10, 11 All 31 ns Puls
37、e duration, RESET tw3see figure 3 9, 10, 11 All 1000 ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97550 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SH
38、EET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Read Cycle Timing Requirements 3/ Test Symbol Conditions -55C TA +125C unless otherwise specified Group A subgroups Device Types Limits Unit Min Max Pulse duration, IOR tw4see figure 3 9, 10, 11 All 80 ns Setup
39、time, CSx valid before IOR 4/ tsu1see figure 3 9, 10, 11 All 15 ns Setup time, A2-A0 valid before IOR 4/ tsu2see figure 3 9, 10, 11 All 15 ns Hold time, A2-A0 valid after IOR 4/ th1see figure 3 9, 10, 11 All 20 ns Hold time, CSx valid after IOR 4/ th2see figure 3 9, 10, 11 All 20 ns Delay time, tsu2
40、+ tw4+ td2 5/td1see figure 3 9, 10, 11 All 175 ns Delay time, IOR to IOR or IOW td2see figure 3 9, 10, 11 All 80 ns Write Cycle Timing Requirements 3/ Pulse duration, IOW tw5see figure 3 9, 10, 11 All 80 ns Setup time, CSx valid before IOW 4/ tsu4see figure 3 9, 10, 11 All 15 ns Setup time, A2-A0 va
41、lid before IOW 4/ tsu5see figure 3 9, 10, 11 All 15 ns Setup time, DB0-DB7 valid before IOW tsu6see figure 3 9, 10, 11 All 15 ns Hold time, A2-A0 valid after IOW 4/ th3see figure 3 9, 10, 11 All 20 ns Hold time, CSx valid after IOW 4/ th4see figure 3 9, 10, 11 All 20 ns Hold time, DB0-DB7 valid afte
42、r IOW th5see figure 3 9, 10, 11 All 15 ns Delay time, tsu5+ tw5+ td4td3see figure 3 9, 10, 11 All 175 ns Delay time, IOW to IOW or IOR td4see figure 3 9, 10, 11 All 80 ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-
43、STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97550 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Read Cycle Switching Characteristics 3/ 6/ Test Symbol Conditions -55C TA +125C unless otherwise
44、 specified Group A subgroups Device Types Limits Unit Min Max Propagation delay time, IOR to BDO or IOR to BDO tpd1CL= 100 pF see figure 3 9, 10, 11 All 60 ns Enable time, IOR to DB0-DB7 valid tenCL= 100 pF see figure 3 9, 10, 11 All 60 ns Disable time, IOR to DB0-DB7 released tdisCL= 100 pF see fig
45、ure 3 9, 10, 11 All 60 ns Transmitter Switching Characteristics 3/ Delay time, interrupt THRE to SOUT 7/ td5see figure 3 9, 10, 11 All 8 24 RCLK cycles Delay time, SOUT at start to interrupt THRE 8/ td6see figure 3 9, 10, 11 All 8 9 RCLK cycles Delay time, IOW (WR THR) to interrupt THRE 8/ td7see fi
46、gure 3 9, 10, 11 All 16 32 RCLK cycles Delay time, SOUT at start to TXRDY td8CL= 100 pF see figure 3 9, 10, 11 All 8 RCLK cycles Propagation delay time, IOW (WR THR) to interrupt THRE tpd2CL= 100 pF see figure 3 9, 10, 11 All 140 ns Propagation delay time, IOR (RD IIR) to interrupt THRE tpd4CL= 100
47、pF see figure 3 9, 10, 11 All 140 ns Propagation delay time, IOW (WR THR) to TXRDY tpd5CL= 100 pF see figure 3 9, 10, 11 All 195 ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 59
48、62-97550 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 8 DSCC FORM 2234 APR 97 TABLE I. Electrical Performance Characteristics - Continued Receiver Switching Characteristics 3/ Test Symbol Conditions -55C TA +125C unless otherwise specified Group A subgroups Device Types Limits Unit Min Max Delay time, from stop to INT 9/ td9see figure 3 9, 10, 1
