1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Update drawing to current requirements. Editorial changes throughout. - gap 06-11-14 Raymond Monnin REV SHET REV SHET REV STATUS REV A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 PMIC N/A PREPARED BY Larry E. Shaw DEFENSE SUPPLY C
2、ENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Tuan D. Nguyen COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Raymond L. Monnin MICROCIRCUIT, DIGITAL, BIPOLAR, ADVANCED SCHOTTKY TTL, QUADRUPLE AND AGENCIES OF THE DEPARTMENT O
3、F DEFENSE DRAWING APPROVAL DATE 97-04-23 2-INPUT POSITIVE-NAND GATES, MONOLITHIC SILICON AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-97577 SHEET 1 OF 11 DSCC FORM 2233 APR 97 5962-E617-06 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STAN
4、DARD MICROCIRCUIT DRAWING SIZE A 5962-97577 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space applicat
5、ion (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 975
6、77 01 Q C X Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2)Device class designatorCase outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA lev
7、els and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit f
8、unction as follows: Device type Generic number Circuit function 01 54F00 Quadruple 2-input positive NAND gates 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor sel
9、f-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline
10、 letter Descriptive designator Terminals Package style C GDIP1-T14 or CDIP2-T14 14 Dual-in-line package D GDFP1-F14 or CDFP2-F14 14 Flat package 2 CQCC1-N20 20 Square leadless chip carrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535
11、, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97577 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maxi
12、mum ratings. 1/ Supply voltage range (VCC) . -0.5 V dc to 7.0 V dc Input voltage -1.2 V dc to 7.0 V dc Input current range -30 mA to 5 mA Voltage range applied to any output in the high state -0.5 V to VCCCurrent into any output in the low state . 40 mA Operating free-air temperature range -55C to +
13、125C Maximum power dissipation (PD) . 56.1 mW Storage temperature range . -65C to +150C Thermal resistance, junction-to-case (JC) See MIL-STD-1835 Junction temperature (TJ) +175C 1.4 Recommended operating conditions. Supply voltage range (VCC) . +4.5 V dc to +5.5 V dc Minimum high level input voltag
14、e (VIH) +2.0 V Maximum low level input voltage (VIL) . +0.8 V Input clamp current (IIK) . -18mA Maximum high level output current (IOH) . -1 mA Maximum low level output current (IOL) . +20 mA Operating free-air temperature range (TA) -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification
15、, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 -
16、 Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawing
17、s. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or www.dodssp.daps.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence.
18、In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. _ 1/ Stresses above the absolute maximu
19、m rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97577 DEFENSE SUPPLY
20、 CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Qu
21、ality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design
22、, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4
23、. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Test circuit and timing waveforms. The test circuit and timi
24、ng waveforms shall be as specified on figure 4. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the ful
25、l case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, th
26、e manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for
27、 device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compli
28、ance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein
29、). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shal
30、l affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V
31、 in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired
32、 to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentatio
33、n shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 8 (see MIL-PRF-38535, appendix A). Provided by IHSNot for ResaleNo reproduction or networking p
34、ermitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97577 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC +125C VCCGroup A subgroups Lim
35、its 1/ Unit 4.5 V VCC 5.5 V unless otherwise specified Min Max Input clamp voltage VIKII= -18mA 4.5 V 1, 2, 3 -1.2 V Short circuit output current IOS 2/ VO= 0 5.5 V 1, 2, 3 -60 -150 mA High level output voltage VOHVIL= 0.8 V, IOH= -1mA VIH= 2 V 4.5 V 1, 2, 3 2.5 V Low level output voltage VOLVIH= 2
36、V, IOL= 20 mA, VIL= 0.8 V 4.5 V 1, 2, 3 0.5 V Input current at maximum input voltage IIVI= 7 V 5.5 V 1, 2, 3 0.1 mA High-level input current IIHVI= 2.7 V 5.5 V 1, 2, 3 20 A Low-level input current IILVI= 0.5 V 5.5 V 1, 2, 3 -0.6 mA Supply current ICCHVI= 0 V 3/ 5.5 V 1, 2, 3 2.8 mA Supply current IC
37、CLVI= 4.5 V 3/ 5.5 V 1, 2, 3 10.2 mA Functional test 4/ VIN= VIHMin or VILMax Verify output VO4.5 V 7, 8 L H See 4.4.1b 5.5 V 7, 8 L H Propagation delay time, low-to-high-level output, tPLHCL= 50 pF, RL= 500 , 5.0 V 9 2.4 5 ns from any A or B data input to Y 5/ 4.5 V to 5.5V 10, 11 2 7 Propagation d
38、elay time, high-to-low-level output tPHL5.0 V 9 1.5 4.3 ns from any A or B data input to Y 4.5 V to 5.5V 10, 11 1.5 6.5 See footnotes on next page. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97577 DEFENS
39、E SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. 1/ For negative and positive voltage and current values, the sign designates the potential difference in reference to GND and the direction o
40、f current flow, respectively, and the absolute value of the magnitude, not the sign, is relative to the minimum and maximum limits, as applicable, listed herein. 2/ Not more than one output should be shorted at a time, and the duration of the short-circuit should not exceed one second. 3/ ICCis meas
41、ured with outputs open, A = B grounded, and all other inputs at 4.5 V. 4/ Tests shall be performed in sequence, attributes data only. Functional tests shall include the truth table and other logic patterns used for fault detection. The test vectors used to verify the truth table shall, at a minimum,
42、 test all functions of each input and output. All possible input to output logic patterns per function shall be guaranteed, if not tested, to the truth table in figure 2 herein. Functional tests shall be performed in sequence as approved by the qualifying activity on qualified devices. Allowable tol
43、erances per MIL-STD-883 may be incorporated. For outputs L 0.8 V, H 2.0 V. 5/ Test circuit and timing waveforms are shown in Figure 4. Device type 01 Case outlines C and D 2 Terminal number Terminal symbol 1 1A NC 2 1B 1A 3 1Y 1B 4 2A 1Y 5 2B NC 6 2Y 2A 7 GND NC 8 3Y 2B 9 3A 2Y 10 3B GND 11 4Y NC 12
44、 4A 3Y 13 4B 3A 14 VCC3B 15 NC 16 4Y 17 NC 18 4A 19 4B 20 VCCNC = No connection FIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97577 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, O
45、HIO 43218-3990 REVISION LEVEL A SHEET 7 DSCC FORM 2234 APR 97 Inputs Outputs A B Y H H L L X H X L H H = High level voltage L = Low level voltage X = Irrelevant FIGURE 2. Truth table. Y = B .A or Y = A + B FIGURE 3. Logic diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted
46、without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97577 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 8 DSCC FORM 2234 APR 97 NOTES: 1. CLincludes probe and jig capacitance. 2. All input pulses have the following characteristics: PRR 1 MHz, tr=
47、tf 2.5 ns, duty cycle = 50%. 3. The outputs are measured one at a time with one transition per measurement. FIGURE 4. Test circuit and timing waveforms. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97577 D
48、EFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 9 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with MIL-PRF-38535 or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be in accordance with MIL-PRF-38535,
