1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Update drawing to current requirements. Editorial changes throughout. - gap 06-11-21 Raymond Monnin REV SHET REV SHET REV STATUS REV A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 PMIC N/A PREPARED BY Rajesh Pithadia DEFENSE SUPPLY
2、 CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Rajesh Pithadia COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Raymond Monnin MICROCIRCUIT, DIGITAL, BIPOLAR, ADVANCED SCHOTTKY TTL, TRIPLE 3-INPUT POSITIVE AND AGENCIES OF TH
3、E DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 97-08-14 NAND GATE, MONOLITHIC SILICON AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-97579 SHEET 1 OF 11 DSCC FORM 2233 APR 97 5962-E619-06 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD
4、 MICROCIRCUIT DRAWING SIZE A 5962-97579 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application
5、(device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 97579 0
6、1 Q C X Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2)Device class designatorCase outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels
7、and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit funct
8、ion as follows: Device type Generic number Circuit function 01 54F10 Triple 3-input positive NAND gates 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certi
9、fication to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter
10、 Descriptive designator Terminals Package style C GDIP1-T14 or CDIP2-T14 14 Dual-in-line package D GDFP1-F14 or CDFP2-F14 14 Flat package 2 CQCC1-N20 20 Square leadless chip carrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appen
11、dix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97579 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum rat
12、ings. 1/ Supply voltage range (VCC) -0.5 V dc to +7.0 V dc Input voltage range (VIN) 2/ . -1.2 V dc to +7.0 V dc Input current range -30 mA to +5 mA Voltage range applied to any output in the high state -0.5 V to VCCCurrent into any output in the low state . 40 mA Storage temperature range -65C to 1
13、50C Power dissipation . 42.35 mW Thermal resistance, junction-to-case (JC) See MIL-STD-1835 Junction temperature (TJ) +175C 1.4 Recommended operating conditions. Supply voltage range (VCC) 4.5 V dc to 5.5 V dc High-level input voltage (VIH) . 2 V min Low-level input voltage (VIL) 0.8 V max Input cla
14、mp current (IIK) . -18 mA max High-level output current (IOH) -1 mA max Low-level output current (IOL) . 20 mA max Case operating temperature range (TC) . -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handboo
15、ks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF D
16、EFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents ar
17、e available online at http:/assist.daps.dla.mil/quicksearch/ or www.dodssp.daps.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references
18、cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the ma
19、ximum levels may degrade performance and affect reliability. 2/ The input voltage ratings may be exceeded provided the input current ratings are observed. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97579
20、 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device m
21、anufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified her
22、ein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outlines. The case outlines shall be in accord
23、ance with 1.2.4. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.3 Electrical performance characteristics and post
24、irradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requireme
25、nts shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is
26、not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall
27、 be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certifica
28、te of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order t
29、o be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-
30、PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lo
31、t of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review
32、for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment
33、 for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 8 (see MIL-PRF-38535, appendix A). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97579 DEFENSE SUPPL
34、Y CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ -55C TC +125C Group A subgroups Limits 2/ Unit unless otherwise specified Min Max Input clamp voltage VIKVCC= 4.5 V, II= -18 mA 1, 2,
35、3 -1.2 V High-level output voltage VOHVCC= 4.5 V, IOH= -1 mA 1, 2, 3 2.5 V Low-level output voltage VOLVCC= 4.5 V, IOL= 20 mA 1, 2, 3 0.5 V Input current IIVCC= 5.5 V, VI= 7 V 1, 2, 3 0.1 mA High-level input current IIHVCC= 5.5 V, VI= 2.7 V 1, 2, 3 20 A Low-level input current IILVCC= 5. 5 V, VI= 0.
36、5 V 1, 2, 3 -0.6 mA Short-circuit output current IOS3/ VCC= 5.5 V, VO= 0 V 1, 2, 3 -60 -150 mA Supply current, all outputs high ICCHVCC= 5.5 V, VI= 0 V 1, 2, 3 2.1 mA Supply current, all outputs low ICCLVCC= 5.5 V, VI= 4.5 V 1, 2, 3 7.7 mA Functional test 4/ VIN= VIHMin or VILMax, Verify output VO,
37、See 4.4.1b 7, 8 Propagation delay time tPLHVCC= 5 V, See figure 4 9 1.6 5 ns from A, B, or C to Y VCC= 4.5 V to 5.5 V, See figure 4 10, 11 1.2 7 tPHLVCC= 5 V, See figure 4 9 1 4.3 VCC= 4.5 V to 5.5 V, See figure 4 10, 11 1 6.5 1/ Each input/output, as applicable, shall be tested at the specified tem
38、perature, for the specified limits, to the tests in table I herein. Output terminals not designated shall be high level logic, low level logic, or open except for all ICCtests, where the output terminals shall be open. When performing these tests, the current meter shall be placed in the circuit suc
39、h that all current flows through the meter. 2/ For negative and positive voltage and current values, the sign designates the potential difference in reference to GND and the direction of current flow, respectively, and the absolute value of the magnitude, not the sign, is relative to the minimum and
40、 maximum limits, as applicable, listed herein. 3/ Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second. 4/ Tests shall be performed in sequence, attributes data only. Functional tests shall include the truth table and other logic pa
41、tterns used for fault detection. The test vectors used to verify the truth table shall, at a minimum, test all functions of each input and output. All possible input to output logic patterns per function shall be guaranteed, if not tested, to the truth table in figure 2 herein. Functional tests shal
42、l be performed in sequence as approved by the qualifying activity on qualified devices.Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97579 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION L
43、EVEL A SHEET 6 DSCC FORM 2234 APR 97 Device type 01 Case outline C and D 2 Terminal number Terminal symbol 1 1A NC 2 1B 1A 3 2A 1B 4 2B 2A 5 2C NC 6 2Y 2B 7 GND NC 8 3Y 2C 9 3A 2Y 10 3B GND 11 3C NC 12 1Y 3Y 13 1C 3A 14 VCC3B 15 NC 16 3C 17 NC 18 1Y 19 1C 20 VCCFIGURE 1. Terminal connections. Provid
44、ed by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97579 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 7 DSCC FORM 2234 APR 97 INPUTS OUTPUT A B C Y H H H L L X X H X L X H X X L H H
45、= High voltage level L = Low voltage level X = Dont care FIGURE 2. Truth table. FIGURE 3. Logic diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97579 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 432
46、18-3990 REVISION LEVEL A SHEET 8 DSCC FORM 2234 APR 97 NOTES: 1. CLincludes probe and jig capacitance. 2. All input pulses have the following characteristics: PRR 1 MHz, tr= tf 2.5 ns, duty cycle = 50%. 3. The outputs are measured one at a time with one transition per measurement. FIGURE 4. Test cir
47、cuit and timing waveforms. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97579 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 9 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sam
48、pling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with MIL-PRF-38535 or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted on all dev
